Digital LED Driver Packs Advanced Functions to Maximize Performance

We have certainly come a very long way from the early days of LEDs and their drivers, starting with the simple and inefficient voltage source and a current-limiting resistor, then on to a basic controlled current source.

For clear evidence of the level of sophisticated performance now available in leading-edge LED drivers, look at the STMicroelectronics STNRG012. The highly integrated and space-saving digital power controller with advanced distortion mitigation offers a lengthy set of optimized features for LED-lighting applications.

Targeting 90-to-300 W power converters, the controller is in full compliance with the many stringent energy-saving requirements. It features patented logic to ensure a very high power factor (PF) and best-in-class total harmonic distortion (THD), even at low loads. Further, its ability to immediately transition between ac and dc voltage inputs suits it well for LED lighting applications with battery-pack backup supplies.

The device contains a multimode power-factor-correction (PFC) controller, resonant half-bridge controller, and 800-V startup circuit, managed by a digital engine (Fig. 1).

1. The high-level block diagram of STMicroelectronics’ STNRG012 shows the key resources it incorporates to provide advanced operation with a large set of features.

The PFC controller changes dynamically between transition mode, discontinuous-current mode (DCM), and valley skipping for optimum efficiency. The half-bridge controller executes ST’s patented time-shift control (TSC) for accurate soft switching. With an input-voltage range up to 305 V ac, the STNRG012 also operates from a dc supply, a major advantage in dual-mode, battery- and line-powered applications.

Hardware IP Blocks and Programming

The digital engine is hosted on an 8-bit core and performs optimized control algorithms (Fig. 2). It manages the PFC and half-bridge circuits via high-speed, state-machine event-driven (SMED) peripherals. Additional dedicated hardware IP blocks, including a power manager and burst-mode engine, ensure robust operation and minimize power consumption in idle mode. System safety features such as surge protection and anti-capacitive protection for the half-bridge are built in, managed by hardware to ensure fast action for superior reliability.

2. The more detailed block diagram of the STNRG012 provides additional insight into its many capabilities and I/O functionality.

The STNRG012 stores operating parameters and calibration coefficients on-chip in non-volatile memory (NVM), which allows users to customize settings and program the device during production. Digital programming also saves external components traditionally used for configuration, reducing the bill of materials and circuit size.

A UART port for monitoring and communication simplifies testing and enables real-time supervision for enhanced reliability. It also incorporates a long list of internal and external protection features, as expected.

The device implements a new THD optimizer algorithm that can be enabled/disabled by the NVM. This new and patented algorithm is based on the enhanced constant on-time (COT) operation (Fig. 3).

3. One example of the many features of the STNRG012 is how its PFC ramp-enhanced constant on-time (RECOT) control comparator threshold is DAC-adjusted based on both the phase of the ac input line and on the mode of the PFC.

The PFC ramp-enhanced constant on-time (RECOT) control comparator threshold is adjusted by the core with a 6-bit digital-to-analog converter (DAC). However, instead of constant threshold, the DAC value depends on both the phase of the ac input line and the mode of the PFC. Moreover, the user can fine-tune the algorithms by the related NVM parameters.

As further evidence of the sophistication and features embedded within this IC, it comes with a 34-page datasheet as a very necessary starting point for designers. In addition, there’s substantial applications support: