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Supercapacitors Enhance LDO Efficiency- Part 1: Low Noise Linear Power Supplies

Supercapacitors Enhance LDO Efficiency- Part 1: Low Noise Linear Power Supplies

DC power supplies for portable devices are expected to be extremely efficient for the reason of energy consumption, longer run time from the battery pack and greener environments. Using supercapacitors in combination with LDOs provides a higher efficiency

State of the art electronic systems employ three fundamental techniques for DC-DC converters: (a) switch-mode power supplies (b) linear power supplies (c) switched capacitor converters. In practical systems, these three techniques are mixed to provide a complex, but elegant, overall solution with energy efficiency, effective silicon or PCB area, and noise and transient performance to suit different electronic circuit blocks[1]. Switching-type DC-DC converters, once the clear choice for 5 V systems, suffer lower efficiency at lower voltages. This is illustrated in Fig. 1, based on the performance of an integrated switching regulator [1]. The graph indicates that the efficiency drops from approximately 79% for a 3.3 V output model to 56% for a 1.2 V output device.

In linear regulators, a series power semiconductor is connected between the unregulated DC rail (VIN) and the regulated output (VOUT). If the control circuits are designed with a low-power approach, efficiency is approximately given by (VOUT/VIN) × 100%. This has led to the development of low-dropout voltage regulators (LDOs) based on linear designs. Compared to a high-frequency switching based switch-mode power supply (SMPS) solution, LDO ICs are faster in responding to load current changes, produce less noise, and are more compact on a PCB or as a part of a complete silicon solution. Often, combining a switcher and an LDO makes more sense in electronic systems where the DC rail voltages are less than 3.3 V and a combination of many different low voltages are within the same system.

Charge pumps or switched capacitor converters use a set of capacitors rather than an inductor or transformer for energy storage and conversion. Designers use charge pumps for DC-DC conversion in applications where regulation tolerance, conversion efficiency, and noise specifications are not very stringent. Recent generations of charge pumps have become viable DC-DC conversion methods for cellular phones, portable wireless equipment, notebook computers, and PDAs, where high-density DC-DC conversion is necessary and the PCB real estate or the silicon area is at a premium [2, 3]. In a practical system, the power supply designer has the possibility of combining these techniques. For an effective overall solution taking all specifications and cost into account, combining a large-capacity bulk SMPS in tandem with LDOs and charge pumps becomes a very effective approach. In portables and SOCs, power management is based on a mix of these LDOs and VLDOs, charge pump converters, and switching regulators.

In powering processor based products, out of the above three categories, switching regulators and LDOs account for a very large share of semiconductors responsible for DC-DC conversion. In portable devices, switching regulators and LDOs are effectively combined, making use of the efficiency advantages of the switching regulators and the low-noise and fast slew rate capability of the LDOs.

In general for switching power supplies, efficiency range is from 70% to 92%, and for general linear regulators efficiency range is from 30% to 60%. LDO-based linear regulators, usually used for currents in the range of 50mA to 1 A range, have approximate efficiencies given by (VO/VIN×100), where a 5 V to 3.3 V version has an efficiency around 66%, while a 3.5 V to 3.3V regulator is 94% efficient.


Any significant efficiency improvements in DC-DC converters, which are based on LDOs, can save significant amounts of energy, providing an additional clear path to greener electronics. The only disadvantage in linear regulators, low efficiency, can be overcome by a patented[4] very low frequency supercapacitor energy recovery technique that achieves efficiencies similar to common switching regulator techniques. This technique was successfully applied in regulator circuits suitable for 12 V to 5 V, 5 V to 3.3 V, 12V to 3.3 V and 5V to 1.5 V[5-7].

This technique is simply based on the hypothesis that the voltage change ΔV across a large capacitance (C), such as an SC, is very small when a finite charge (or discharge) current IL flows during a finite time Δt, that is:

By placing a pre-charged SC in series with an LDO, you can neglect the effect of ΔVIN terms of operational principles applicable to a circuit. The series SC will not act as a blocking element in the series path for a relatively long time, milliseconds to seconds, depending on the SC's value. Based on this simple principle, this SC-based energy recovery technique suitable for linear regulators was developed using a single SC or an array of SCs in the series path to recover and reuse the wasted energy[4, 5]. Fig. 2 shows the simplified approach of the technique.

In Fig. 2, SC is charged by the input current of the LDO and the stored energy in the capacitor is reused by the LDO in the next phase. This approach allows a significant improvement in the average efficiency of the overall circuit on an end-to-end basis, while maintaining the useful characteristics of a linear regulator. The linear regulator in Fig. 2(a) operates with a low voltage difference between the input and output sides of the series pass element. A pre-charged SC is placed in series with the series pass element until the V IN reaches the lowest allowed input voltage value, VIN(MIN) specified for the LDO. In the next phase, the capacitor is placed in parallel to the input of the linear regulator to discharge the SC energy into the regulator stage.

If the initial voltage across the SC is VCO before placing it in series with the LDO, after a period of Δt, the instantaneous voltage across the capacitor, is:

If the unregulated source voltage is VS, and the instantaneous voltages across the SC in the series configuration, and the input voltage of the LDO are and VIN respectively:

Series SC charges until voltage across the capacitor reaches the end of the charging time. In order to discharge this SC later up to VIN(MIN) it should satisfy which results in the criteria VS > 2VIN(MIN). After the charging process of the SC its stored energy can be reused as shown in Fig. 2(b) until its terminal voltage drops back to satisfying:

This circuit draws power from the unregulated input only during half the time of its operating period. During the SC charging time it draws current from the unregulated supply, whereas during the discharging time SC delivers energy to the load keeping the unregulated power supply disconnected from the system, so that the average input current is IIN/2.

Considering ideal capacitors and switching elements, approximate end-to end efficiency of the case where VS > 2VIN(MIN). is given by:

For a 12 V to 5 V proof of concept circuit, an overall end-to-end efficiency improvement from 42% (theoretical maximum) to over 80% has been practically achieved[5], and the circulation frequency was in the orders of few Hertz to few 100Hz only. This approach, of utilizing a charged SC as a lossless dropper in the series path creates circulating frequencies below a few 100Hz in the worst case, compared to the RFI/EMI generating frequencies in the few 100 kHz to several MHz used in switching regulators.

In the recent years, several companies have come up with extremely thin profile supercapacitors. Cap-XX from Australia and Cellergy (Israel) are some suppliers aiming at the portable device market. In our proof of concept circuits, we selected extremely thin profile SCs (Fig. 3a) from CAP-xx to minimize the volume of these voltage regulators so that the miniaturization requirements in portable products could be easily maintained. Fig. 3b indicates the efficiency improvements in the early prototype versions.

Fig. 4 depicts a schematic of an early version of a 12 V to 5 V circuit where solid-state relays (with high series resistance) were used as the switches required. Fig. 5(a) depicts the basic low frequency circulation concept using very low speed switching arrangement where the circulating frequency was only in the order of few tens of Hertz.

The above proof of concept prototype was based on the criterion: VS > 2VIN(MIN) applies to a simple case, such as a 12 V to 5 V regulator. The technique can be adapted to other practical requirements, as far as the case of a linear regulator is broadly applicable[8,9] for the task of output regulation.

The case where VS < 2VIN(MIN} is applicable to converters such as 5 to 3.3 V and similar situations. In this case, agroup of parallel (identical) supercapacitors are connected in series with the LDO. During charging when the VIN(MIN) for the LDO is reached, the controller transfers the switches to the series configuration reusing the accumulated charge in the SCs until its terminal voltage drops back to 1.2 V. For example, in the 5 to 3.3 V case, we can have three SCs where each one is charged up to a maximum of 1.5 V which will give a series voltage 4.5 V to be applied to the input of the LDO as shown in Fig. 5. Once this discharges, voltage could drop up to the level of 1.2 V per capacitor.

The case where VS > 3VIN(MIN) is applicable to situations such as 5 V to 1.5 V and similar regulators. Here, a group of series SCs are connected in series with the LDO. When VIN reaches VIN(MIN) reaches the controller transfers the switches to the parallel capacitor configuration, reusing the accumulated charge in the SCs until its terminal voltage drops back to VIN(MIN). For example, in the 5 V to 1.5 V case, two supercapacitors are charged up to a maximum of 3.4 V, which will give a parallel voltage across each capacitor of 1.7 V to be applied to the input of the LDO. Once this discharges, it could drop to the case of 1.6 V per capacitor, as shown in Fig. 6.


  1. B. Travis, “Linear VS Switching supplies: Weighing all the options,” EDN Magazine, 1998.

  2. O. Khorshid, “Selecting charge-pump DC/DC converters,” EDN Magazine, pp. 115, August 17 2000.

  3. N. Kularatna, Electronic circuit design: From concept to implementation pp. 150-160: CRC Press, 2008.

  4. U.S. Patent 7, 907,430 B2, Kularatna et. el; High current voltage regulator, March 15, 2011.

  5. N. Kularatna, “A low-frequency supercapacitor technique for efficiency improvement in linear regulators.” Proc. of IEEE-IECON 2009, pp. 132 - 135

  6. N. Kularatna, J. Fernando, K. Kankanamge et al., “Very low frequency supercapacitor techniques to improve the end-to-end efficiency of DC-DC converters based on commercial off the shelf LDOs” in IECON ‘10, 2010.

  7. N. Kularatna, J. Fernando, K. Kankanamge et al., “Low frequency supercapacitor circulation technique to improve efficiency of linear regulators based on LDO chips” in APEC ‘11, 2011.








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