Power Electronics

Optimal Transient Response for Processor Based Systems

A power supply design using a buck converter that, along with possessing excellent DC regulation accuracy, must be optimized for best transient performance.

Find a downloadable version of this story in pdf format at the end of the story.

Processor-based systems place strenuous voltage regulation requirements on their power supply. In many instances, this voltage regulation must be as tight as ±5 percent. This tolerance includes DC set point accuracy, accuracy over temperature and input voltage variations, and transient response.

For processors, a well-regulated power supply is critical for proper operation and reliability. If the voltage on the processor is too high, then the processor could be permanently damaged. Another possible consequence of a power supply voltage that is too high is excessive power consumption, which leads to elevated operating temperatures, reduced reliability, and possibly system thermal shutdown.

If the voltage from the power supply is too low, however, then the processor may go into a brown out or under voltage lockout (UVLO) condition and need to be reset, resulting in lost or corrupted data.

Even a processor voltage that is only temporarily too high or too low can cause problems with the end equipment's operation. Under worst-case conditions, variation in voltage due to load, line, temperature, or simply part-to-part variation and/or tolerance in the power supply IC can all sum together to exceed the processor's requirements. For any end equipment that uses a processor, it is critical to have a power supply that always regulates its output voltage within the processorís input voltage requirements.

As an example of a processor's power supply requirements, Fig. 1 shows the basic power requirements for TI's DaVinci family of processors using the TMS320DM643 as an example. The most difficult voltage to regulate is the Vcore supply, as it has the largest load variation (up to 1.48 A) and smallest allowed voltage deviation (±5% = ±60 mV).


The first step in meeting such rigorous voltage requirements is superb DC accuracy. This is the accuracy of the output voltage in a steady state condition. As such, DC accuracy incorporates the steady state variation due to changes in line, load, temperature, and from part to part.

An IC that can provide the required output voltage and current for the processor is the TPS62060 from TI, a 1.6 A integrated switch buck converter that provides very good efficiency at a very reasonable cost and size. The datasheet for this converter specifies the accuracy of the output voltage feedback pin over temperature, input voltage, and from part to part at ± 1.5 % maximum. The accuracy across load is specified to be +/-0.5% / A. For the processor's full load current of 1.48 A, this equates to a +/-0.74 % (+/-0.5% / A * 1.48 A) load regulation accuracy. Total DC regulation for the step-down converter is ±1.5% (±18 mV) at no load, and +1.5% / +/-2.24% (+18 / +/-27 mV) at the full load of 1.48 A. The external feedback resistors also affect the output voltage accuracy. For the purposes of this article, 0.1% resistors are assumed to be used; therefore, their effect is negligible.


The TPS62060 step down converter operates with typically 3MHz fixed frequency PWM at moderate to heavy load currents. At light load currents the converter can automatically enter Power Save Mode and then operates in Pulse Frequency Mode (PFM) mode. During PWM operation the converter uses a fast response voltage mode controller with input voltage feed-forward to achieve good line and load regulation.

At the beginning of each clock cycle the high side MOSFET switch turns on. Now, current flows from the input capacitor via the high side MOSFET switch through the inductor to the output capacitor and load. During this phase, the current ramps up until the PWM comparator trips and the control logic turns off the switch. The current limit comparator will also turn off the switch if the current limit of the high side MOSFET switch is exceeded. After a dead time (preventing shoot through current) the low side MOSFET rectifier turns on and the inductor current ramps down. Then, current flows from the inductor to the output capacitor and load. It returns back to the inductor through the low side MOSFET rectifier.

Continue on next page

Transient response refers to the output voltage deviation when the system is subjected to some transient disturbance from its steady state operating point. The transient response defines how far away from the steady-state operating point the output voltage goes before the control loop is able to bring it back to the steady state value - the set point of 1.2 V. The sum of the DC accuracy and transient response defines the total accuracy of the power supply.

The most significant aspect of transient response is the change in output voltage due to a sudden change in the load current. A load transient consists of a sudden change in load current that occurs faster than the bandwidth of the control loop. Because the voltage change caused by a load transient is extremely fast, it is not considered part of load regulation, which is simply a DC characteristic.

A load step measurement measures the voltage deviation resulting from a load transient. In this test, the power supply's output voltage is very quickly disturbed by quickly changing the load current. The rate of change of the load current (slew rate) should be faster than the loop bandwidth of the power supply in order to get a true load transient response measurement. The load current at the beginning of the test and the load current at the end of the test should reflect the actual processor load current levels. This minimum and maximum current will vary from application to application and must be measured. Ideally, the load step test's slew rate will match the processor's Vcore current slew rate, but this is not always possible to measure and/or reproduce. Extra output voltage accuracy margin should be given if the processor's slew rate exceeds the load step test's slew rate.

Assuming the load step test's slew rate can match that of the processor, then the transient response requirements can be generated based on the DC accuracy results above and the total voltage accuracy required. When the processor is idling at no load, then the DC accuracy is ±1.5%. A load transient disturbance can only increase the load current, which would pull the output voltage lower. Thus at no load, the only concern is the negative accuracy specification of -±1.5% DC accuracy and -5% total accuracy required. This leaves -3.5% for the transient response specification at no load. For the 1.2 V Vcore voltage rail, this equates to -42 mV. Fig. 2 shows the no-load accuracy stack-up and the resulting transient response requirement that must be met by the power supply.

For the full load transient response specification, the same methodology is used. At the full load of 1.48 A, the DC accuracy is +1.5% /-2.24%. At this operating point, a load transient is only capable of reducing the load, which would cause the output voltage to go higher. At full load then, the only consideration is the positive accuracy specification, as the load step can only add to the output voltage. This also equates to a +3.5% allowable output voltage tolerance, which is 42 mV for the 1.2 V Vcore voltage rail. Fig. 3 shows the full load accuracy stack-up and the resulting transient response requirement that must be met by the power supply.

The power supply must be designed to meet these transient response requirements. To do this, first define the load current levels that the processor (the load) will be switching between in its operation. As an example of a typical processor application, consider a load step from 200 mA to 1.2 A. During this load transient, the power supply must maintain the output voltage within its set point by ±3.5% or ±42 mV. Achieving this allows a total regulation (both DC accuracy and transient response) of ±5%.

Fig. 4 shows the converter's load step response with a 1.2 V output voltage and a 200 mA to 1.2 A load step change. The circuit used to take the measurement is the typical application circuit in the datasheet (1 µH inductor and 10 µF output capacitor), modified to produce a 1.2 V output. The +112 mV and +113 mV voltage deviation does not meet the processor's load transient requirements.

Continue on next page


However, this response can be improved by properly selecting the converter's output filter, the inductor and output capacitor. Choosing a smaller inductor value and a larger capacitor value decreases the change in output voltage during a load step. The new inductor and capacitor selection must also result in a stable power supply design. Refer to the application note, Optimizing TPS6206x External Component Selection, which assists with properly selecting the output inductor and capacitor for the TPS62060 to improve transient response while maintaining control loop stability. The smallest recommended inductor of 0.56 µH and largest recommended output capacitor value of 100 µF are used. The large capacitor holds up the output voltage during load transients, while the small inductor allows the IC to quickly slew the current to accommodate the changing processor demands.

Changing the output filter requires a change to the feed-forward capacitor (C3 in Fig. 5). A properly selected feed-forward capacitor gives increased bandwidth and additional phase, resulting in increased control loop stability. A feed-forward capacitor is required for proper operation of the TPS62060. Based on empirical measurements of the transient response and bode plot, a 47 pF feed-forward capacitor is used to ensure stability while maintaining fast transient response.

Fig. 5 shows the power supply's final schematic. The inductor, L1, is Coilcraft's LPS4018. The output capacitor, C2, is a 6.3 V, X5R, ceramic in a 1210 package. The input voltage is 3.6 V, corresponding to the average voltage of a single lithium battery cell.

Fig. 6 shows the resulting voltage deviation (transient response) of the circuit in Fig. 5, when subjected to the desired load step of 200 mA to 1.2 A. Total transient response is +31 mV and +41 mV. This meets the transient response requirement of ±42 mV with margin.

A bode plot of the final circuit at full load should be taken to check stability. Fig. 7 shows the bode plot of the circuit in Fig. 5 running at 1.48 A. The phase margin of 43 degrees shows that the circuit is stable. The phase margin is the distance from zero degrees of phase, when the gain crosses 0 dB (this point is circled on Fig. 7).


Changing the output filter from the datasheet's recommendations requires the designer to consider performance tradeoffs. The lower inductance used affords the opportunity to choose a physically smaller inductor, which may cost less, or to choose an inductor in the same package as the original, but with a lower DCR. The lower DCR reduces the conduction losses in the inductor, but the lower inductance value increases the AC losses in the inductor. Efficiency measurements should be conducted to assess the total impact on the final design.

Additionally, reducing the inductance also decreases the available current that the converter can provide. The converter limits the peak current in the inductor which equals the sum of the output current and one half of the ripple current. The reduced inductance increases the ripple current, because the ripple current (ΔIL) equals VOUT * (1 -VOUT / VIN) / (L * f), where L is the inductance. After changing from the standard 1 µH inductor to the 0.56 µH inductor that is used is this design, the minimum output current of the converter decreases from 1.67 A to 1.56 A.

Increasing the output capacitor value reduces the magnitude of the already very low output voltage ripple. This is usually desirable as it produces a lower noise, cleaner power supply. Fig. 8 shows the output voltage ripple with the standard converter design using a 1 µH inductor and 10 µF output capacitor. Fig. 9 shows the output voltage ripple with the 0.56 µH inductor and 100 µF output capacitor used for this processor design. Increasing the output capacitance requires a larger, costlier output capacitor, because ceramic capacitor pricing is proportional to case size.

Changing the inductor value changes the PSM (power save mode) to PWM mode transition point. This will affect efficiency at lower loads. These tradeoffs must be considered when finalizing the power supply design for any system.

The typical application circuit in power converter datasheets provides good performance for many applications. A few applications, including powering processors and digital signal processors (DSPs), require a more stringent design in order to meet output voltage regulation requirements. Fortunately, engineers are not confined to use the typical application circuit, provided that they understand the allowable changes in the IC's external circuitry, particularly the inductor and output capacitor. Changing the output inductor and/or output capacitor results in performance changes with various consequences. These include changes in load transient response, output voltage ripple, available output current, stability, efficiency, circuit size, and cost. Working within the allowable component constraints of the IC, engineers can optimize the power supply's load transient response to meet their processor's requirements.


  1. Optimizing TPS6206x External Component Selection, SLVA441, Texas Instruments, September 2010.

  2. Download a datasheet for the TPS62060 here: www.ti.com/tps62020-ca.

  3. Optimizing Transient Response of Internally Compensated dc-dc Converters With Feedforward Capacitor, SLVA289, Brian Butterfield, Texas Instruments, January 2008.

Download the story in pdf format here.

Hide comments


  • Allowed HTML tags: <em> <strong> <blockquote> <br> <p>

Plain text

  • No HTML tags allowed.
  • Web page addresses and e-mail addresses turn into links automatically.
  • Lines and paragraphs break automatically.