Power Electronics

Interleaved Boundary-Mode PFC Controller Delivers Over 96 Percent Efficiency

Fairchild Semiconductor brings power supply designers a boundary-conduction mode (BCM) interleaving power factor correction (PFC) controller that provides over 96 percent power conversion efficiency for AC-DC power supplies. Applications include power supplies for digital TVs, desktop and entry-level server computers, front-end telecom systems and industrial power systems rated from 100W to 1000W. Historically, the higher-efficiency and lower-cost BCM PFC converters are limited to about 300W of maximum power level. Interleaving extends the power range of BCM control while ripple current cancellation minimizes high peak currents. By interleaving and keeping two power stages precisely at 180 degrees out of phase timing under all operating conditions, the FAN9612 lowers conduction losses. These energy-conservation benefits are integral in helping customers meet the latest ENERGY STAR® and Climate Savers Computing Initiative requirements.

By the interleaving of the power trains, the FAN9612 is also able to reduce the input filter size and reduce board space by as much as ten percent compared to alternate solutions. This smaller system footprint reduces the overall cost of the solution and simplifies design, without compromising on protection features.

The FAN9612 incorporates the industry's most comprehensive set of features including: Automatic phase disable to operate with only one channel under light-load conditions, minimizing power losses.
1. A low start-up and operating current.
2. Valley switching technology, minimizing losses at MOSFET turn-on.
3. Over-current and power-limit protection for each channel.
4. Two-level output over-voltage protection (OVP).
5. Input brownout protection and line OVP.
6. Minimum restart timer frequency to avoid audible noise.
7. Maximum switching frequency clamp.
8. Programmable closed-loop soft-start, which minimizes output voltage overshoot at start-up.
9. Input voltage feed-forward function that minimizes output voltage variation versus line voltage.

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