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Power Electronics

True Bridgeless PFC Converter Achieves Over 98% Efficiency, 0.999 Power Factor

A bridgeless PFC converter (patents pending) based on novel hybrid-switching method eliminates the full-bridge rectifier altogether. The true single-stage power processing results in many advantages over conventional two-stage, bridge-type PFC converters.

Current regulations IEC-1000-3-2 impose strict requirements on the harmonic current content, which can be sent back to utility lines for all consumer electronic devices consuming more than 75W of power. To meet that requirement, the active Power Factor Correction (PFC) must be employed. The most common PFC solution, a boost converter, requires the use a full-bridge diode rectifier ahead of the boost converter in the circuit. This design greatly impairs the efficiency, as the two diodes in the bridge rectifier are in the direct power path for either positive or negative half-cycle of input ac line voltage. Hence, at low line ac voltages of 85V, this leads to 3% power loss, which together with power losses of the boost converter reduces overall efficiency to 93% or lower.

Thus, a very clear objective to increase the efficiency is to devise a converter which can eliminate a front-end full-bridge rectifier. But past attempts to develop such a converter failed to eliminate diode-bridge rectifiers, leading to the belief that such converter topology could not exist. Thus, some research publications now erroneously call boost PFC and double boost PFC converters and other variants single-stage PFC converters, simply not counting the front-end bridge rectifier as being always needed in front and considered an unavoidable front-part.

However, this is NOT the case as a new class of converters capable of the direct ac-dc conversion with PFC is indeed possible as introduced for the first time in this article. One member of this new class of single-stage ac-dc PFC converters is displayed in Figure 1a. The other converter topologies of this new single-stage PFC converter will be presented in the future.


The new bridgeless PFC converter operates directly from the ac line and is the first true single-stage bridgeless ac-dc PFC converter.

To accomplish this objective, the new switching power conversion method, termed hybrid-switching, is needed (see sidebar: What is Power Factor (PF) and Why Low PF is bad). This method also leads to a rather unusual converter topology consisting of three switches only: one controllable switch S and two passive current rectifier switches CR1 and CR2 as seen in Figure 1a, which turn ON and turn OFF in response to the state of the main switch S for either positive or negative polarity of the input ac voltage.

The odd number of switches, three, is a distinctive characteristic of this converter with respect to all conventional switching converters, which always come with an even number of switches, such as 2, 4, 6 etc. This was dictated by the requirement of square-wave switching, often called PWM switching, using both inductive and capacitive energy transfers, which requires that the switches come in complementary pairs: when one ,switch is ON its complementary switch is OFF, and vice versa [1, 2 and 4].

Here, no such complementary switches exist, as one active switch S alone controls both diode switches, whose roles are changed automatically according to the polarity of the ac input voltage. For example, for the positive polarity of the ac input voltage, current rectifier CR1 conducts during the ON-time interval of switch S. Then for negative polarity of ac input voltage, the same current rectifier CR1 conducts during the OFF-time interval of switch S. The current rectifier CR2 also responds automatically to the state of the switch S and polarity of the input ac voltage. For the positive polarity it conducts during OFF-time interval of switch S, and for negative polarity it conducts during the ON-time interval of switch S.

Thus, the three switches operate at all times, for both positive and negative half-cycles of the input ac line voltage. Hence, this true Bridgeless PFC converter™ operates without the full-bridge rectifier since the converter topology itself performs an implied ac line rectification to result in DC output voltage for either polarity of input ac line voltage. Eliminating the full-bridge rectifier directly eliminates large losses especially for the low line of 85V.

As seen in Figure 1a, this topology consists also of an inductor in series with the input, the floating energy transferring capacitor, which act as a resonant capacitor for the part of the switching cycle, and a resonant inductor.

The active switch S on the primary side is modulated and operated at the switching frequency, which is three orders of magnitude higher than the line frequency, such as 50kHz switching frequency compared to a low ac line frequency of 50Hz or 60Hz. Note also that the duty ratio D is defined with respect to ON-time of the controlling switch S and all steady-state quantities, such as DC conversion ratios and DC current of inductor L will be expressed in terms of D.

The full-wave input line voltage and input line currents are sensed and sent as input to the bridgeless PFC IC controller, which in turns modulates the switch S on the primary side, so as to force the input line current to be proportional to the input line voltage to result in ideally desired Unity Power Factor as already illustrated in Figure 1b.

The line current iAC in that case is also sine-wave and is free from high frequency harmonics, thanks to the use of a small high frequency filter Lf, Cf at the ac input. The reality is rather different as the line voltage is quite distorted as described in the last section when an experimental 400W prototype was operated directly from such a distorted line but with unity power factor.

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The Bridgeless PFC converter ™ has two inductors, PWM inductor, L, and resonant inductor, Lr. As the enclosed analysis shows, the hybrid-switching method results in fundamentally different voltage excitation of the two inductors: PWM inductor L is excited as in PWM converters with a square-wave like voltage so that the inductor is flux-balanced over the entire switching period TS: positive flux during the ON-time interval and negative flux during OFF-time interval. Resonant inductor Lr is excited with a co-sinusoidal ac ripple voltage Δvr of the resonant capacitor Cr and is fully flux-balanced during ON-time interval only.

The large difference in the flux excitations of the inductor L and resonant inductor L is due to resonant inductor being exposed to ac ripple voltage of resonant capacitor during ON-time interval only, while inductor L is exposed to large voltage excursions during both ON-time and OFF-time interval consisting of the linear combination of large dc quantities, such as input and output dc voltages and resonant capacitor dc voltage. Consequently, the resonant inductor is much smaller than PWM inductor, yet its presence plays the crucial role in making single-stage, bridgeless PFC conversion possible.

Hybrid switching is a unique combination of the square-wave (PWM) switching and resonant switching. The PWM inductor exhibits PWM behavior during the whole switching period, while the resonant inductor exhibits resonant behavior during ON-time interval only. Finally, the resonant capacitor in conjunction with resonant inductor exhibits resonant behavior during ON-time interval but PWM behavior in conjunction with PWM inductor during the OFF-time interval. Thus, the resonant capacitor is common thread making such unique operation of two inductors possible, one in resonant mode the other in PWM mode.

Another clear distinguishing characteristic of hybrid switching is that there are three switches as opposed to two or four switches in the conventional PWM and other resonant converters. There is only one controlling active switch and two passive diode switches. Note that this new hybrid-switching method is operating in a completely different manner than the well-known conventional Square-wave Quasi-resonant converters [2], Series and Parallel resonant converters [3] and Converters with Resonant Switches [5] as well as all other presently know resonant methods.


Here, only a simplified analysis is included which is sufficient to derive dc voltage conversion ratios for either positive or negative DC input voltage. The more comprehensive analysis based on an extension of State-Space Averaging Method [2] can also be employed to result in complete dc steady-state quantities for all the storage components and also the analytical solution for the dynamic (frequency response of the converter) for the purpose of control and regulation and stability analysis.

Clearly, the actual time domain waveforms of the resonant capacitor voltage and resonant inductor current have to be analyzed separately. This is done in a separate later section in which the solution the analytical time domain solution is found so that the derived analytical equations could be used for design. This actually proves that the method of State-Space Averaging is not applicable to resonant converters[2] and that is not limited to PWM converters only due to low ripple approximations (low ripple voltages and ripple currents) but that it has a more general applicability including the dynamic analysis of this new class of resonant converters based on Hybrid Switching Method.

First, we analyze the converter operation with respect to the converter in Figure 4a in which input voltage source is positive dc voltage and having the switch states as in Figure 4b. The linear switched network for ON-time interval is shown in Figure 4c and the linear switched network for OFF-time interval is shown in Figure 4d. To simplify the analysis, we will assume that the inductor L is very large, resulting in a constant input dc current I with negligible ac ripple current.

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The volt-second (flux balance) on inductor L requires that for the steady-state, the positive and negative areas of the voltage waveform in Figure 5a must be balanced so that:

VgDTS = (V + VCr - Vg) (1-D)TS (5)


Vg = input voltage

D = Duty ratio

TS = Switching period in seconds

VCr = DC voltage on the resonant capacitor Cr

Unlike the PWM inductor L, which was flux balanced over the entire switching period TS, the resonant inductor Lr must be fully flux balanced during the ON-time interval only as seen in Figure 5b. Thus applying the steady-state criteria for the resonant inductor Lr results in:

VCr = 0 (6)

as the resonant inductor must be flux-balanced and cannot support any net dc voltage.

Therefore, the dc voltage, VCr, of the resonant capacitor Cr must be zero so that the volt-second balance is satisfied on the resonant inductor Lr.


Using Equation (6) in Equation (5), the dc conversion ratio is obtained as:

V/Vg = 1/(1-D) (7)

Note that the dc conversion ratio given by Equation (7) is the same as for well-known boost converter. Furthermore, despite the resonant circuit consisting of resonant capacitor Cr and resonant inductor Lr, and corresponding sinusoidal and co-sinusoidal time domain waveforms of resonant current and resonant capacitor voltage, the dc conversion ratio does not depend on either one of them and their values or the switching period TS, but only depends on the operating duty ratio, D, as in conventional dc-dc converters.

The simple dc conversion ratio dependent on duty ratio only, as in square-wave PWM switching, is obtained. Hence, the regular duty ratio control can be employed to use this converter as a basis for PFC control, as in boost and other conventional converters.

The resonant inductor current, ir, during entire switching period is shown in Figure 6a, while the resonant capacitor voltage is shown in Figure 6b, which displays the linear charging of the resonant capacitor Cr during the OFF-time interval. Note also the continuity of the capacitor voltage at the transition between two switching intervals.

Next, we analyze the converter operation with respect to the converter in Figure 7a in which input voltage source is negative polarity dc voltage and having the switch states as in Figure 7b. The linear switched networks for ON-time interval are shown in Figure 7c and linear switched network for OFF-time interval is shown in Figure 7d.

We now use the two linear switched networks in Figure 7c and Figure 7d to construct the time domain of the current in the PWM inductor L and in the resonant inductor L. The voltage waveform on inductor L is shown in Figure 8a to be just as in conventional PWM square-wave switching converters, while the resonant capacitor VCr voltage is illustrated in Figure 8b only for ON-time resonant interval and its complete time domain waveform in Figure 9b.

The Volt-second (flux balance) on inductor L requires that for the steady-state, the positive and negative areas of the voltage waveforms in Figure 8a must be balanced so that:

VgDTS = (VCr - Vg)(1-D)TS (8)

Unlike the PWM inductor, which was flux balanced over the entire period TS, the resonant inductor must be fully flux-balanced during the ON-time interval only as per resonant circuit model of Fig. 10b and Fig. 10c.

The resonant circuit model of Figure Figure 10b is formed by the loop consisting of five components, two capacitors Cr and C and resonant inductor Lr, switch S and current rectifier CR2. However, since the output capacitor C is much larger than the resonant capacitor Cr, their series connection is effectively equal to Cr.

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The resonant circuit for positive input voltage in Figure 10a had only one capacitor, resonant capacitor Cr. On the other hand, the resonant circuit for negative input voltage has two capacitors in series as in Figure 10b. However, because of the much larger output capacitor, both reduce effectively to the resonant circuit shown in Figure 10c. Moreover, due to the automatic changeover of the roles of the two current rectifiers from positive polarity input voltage to negative polarity input voltage, the resonant circuit of Figure 10c is applicable to the same ON-time interval for either positive or negative polarity of input voltage. The resonant circuit will therefore result in resonant capacitor voltage as in Figure 8b and in the resonant inductor current as in Figure 9a as was obtained before for positive input voltage.

The resonant inductor, Lr, must be once again fully flux-balanced during the same ON-time interval, DTS, only, which results from switched network in Figure 7c and circuit model in Figure 10c:

VCr = V (9)

as the resonant inductor cannot support any net DC during this ON-time interval.

Note that the steady state DC voltage on the resonant capacitor has changed substantially from VCr = 0 for positive input voltage to VCr = V for negative input voltage.

Replacing Equation (9) into Equation (8) we get the dc conversion ratio as:

V/Vg = 1/(1-D) (10)

which is the same as Equation (7) for positive input dc voltage.

Therefore, despite different dc voltages on the resonant capacitors for positive input voltage (zero dc voltage) and for negative input voltage (output dc voltage V), the dc conversion ratios are identical for positive and negative polarity input voltages as shown by Equations (7) and (10).

As before, the resonant discharge current ir of capacitor Cr is limited to only a positive cycle of resonant current as current rectifier CR2 now permits conduction in only one direction as in Figure 7c. As the resonant current starts at zero level, this effectively restricts the resonant discharge interval once again to exactly one-half of the resonant period, the same as before.

The waveforms over the complete period for resonant inductor current ir(t) and resonant capacitor voltage vCr(t) are then illustrated in Figure 9a and Figure 9b. Note how the continuity of the voltage on resonant capacitor results in the same ac ripple voltage Δvr at the transition between two intervals. Once again, the resonant capacitor dc voltage is not zero, but equal to output dc voltage V. Thus, the same dc conversion gain function is obtained despite drastically different steady-state values of dc voltage on capacitor Cr equal to zero for positive input, and equal to output dc voltage V for negative input.

The new PFC converter has an energy transferring capacitor, Cr, which during the OFF-time interval TOFF charges and at the same time passes the input charging current to the load. Then during the ON-time interval, TON, this capacitor forms a resonant circuit with the resonant inductor Lr and exchanges the energy stored in previous OFF-time interval with resonant inductor. The resonant inductor is much smaller than PWM inductor L. As a result, it stores much less inductive energy than the PWM inductor L. Nevertheless, the current direction in this resonant inductor changes from one direction in OFF-time interval to another direction in the ON-time interval. This change of the direction of resonant inductor current during the short transition could cause the voltage spikes on the switch S. The faster the change, the bigger the voltage spike would be. However, due to small energy stored in this small inductor, this spike can be effectively suppressed by use of Zener diodes.


As seen above, operation of the converter from positive input voltage and negative input voltage, results in the resonant circuit models, which can be both described by the two first order differential equations whose solutions are:

ir(t) = IP sin(ωrt) (11)

vCr (t) = Δvr cos(ωrt) (12)

Δvr = IP RN (13)


RN = Natural resistance

fr = Resonant frequency

ωr = Radial frequency

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The bridgeless PFC converter has one component, the controlling switch S whose implementation is critical to the overall efficiency. From the description of the converter operation for positive and negative output voltages, it is clear that this switch S must have a two-quadrant switching characteristic operating in the first and third quadrant as illustrated in the definition of switch S in Figure 11a. In other words, switch S must for positive input voltage operate in first quadrant, but should also be able to sustain a full reverse voltage (third quadrant operation). Clearly, neither bipolar, nor MOSFET transistor can do that as they are not designed to sustain voltage in the third quadrant (MOSFET due to presence of the body diode). However, the Reverse Blocking Isolated Gate Bipolar Transistor (RBIGBT) can sustain the full reverse voltage as it is designed to do so and can sustain the full voltage of opposing polarity. Therefore, the switch S implementation uses two such RBIGBT devices in parallel.

Yet, in many practical applications, the MOSFET implementation is desired due to high switching frequency capability and low conduction losses. At present, a single MOSFET implementation is not possible due to built-in body-diode, so that switch S must be implemented by use of the two MOSFET devices connected in series at their sources and driven by a common floating gate drive circuit.

As the conduction losses are by far the dominant losses of the whole converter, it is expected that such switch implementation could raise the overall efficiency from the current 98% (see enclosed experimental measurements) to over 99% in near future.


The dc gain characteristic of Equation (7) suggests that the converter would have the start-up problem as the dc gain characteristic is always greater than 1, since at start-up the output dc voltage is zero. The same conditions apply in the boost converter, which then requires use of in-rush current limiting circuitry. This converter, however, does not require such circuitry as its special mode of operation at low duty ratios permits a soft-start from zero output voltage.

Shown in Figure 12 with dashed lines is the ideal dc conversion gain characteristic given by Equation (7). The actual measured dc conversion characteristic shown in solid line, however, reveals the existence of the shaded region at very low duty ratios during which the dc conversion gain drops to zero. Therefore, effectively, the actual dc conversion gain is that of a step-down/step-up type. Thus, the output dc voltage can be started smoothly from zero dc output voltage and brought by duty ratio increase into a step-up dc conversion region without the need for in-rush current limiting circuitry.


A 400W prototype was built to verify the basic operation of the Bridgeless PFC converter and is shown in Figure 13a while the measurements of the line voltage and the line current recorded under Unity Power Factor control are illustrated in Figure 13b. Note that the line current is indeed proportional to the line voltage. However, there is a significant distortion in the line voltage. The distorted line voltage is the result of the many users connected to that line drawing the power at the peak of the AC line voltage resulting in the sag of the line voltage.

It is interesting to note that in that case, the objective is still not to draw the sinusoidal line current but instead the line current proportional to the line voltage. This will still result in PF=1, even though the line voltage is no longer sinusoidal but distorted. The power factor measured on this converter prototype is 0.999.

For questions regarding this article and to contact the author, readers should visit TESLAco's Web site at

Footnote: Bridgeless PFC Converter TM and Single-Stage PFC Converter TM are trademarks of TESLAco

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  1. Slobodan Cuk, “Modelling, Analysis and Design of Switching Converters”, PhD thesis, November 1976, California Institute of Technology, Pasadena, California, USA.

  2. Dragan Maksimovic, “Synthesis of PWM and Quasi-Resonant DC-to-DC Power Converters”, PhD thesis, January 12, 1989, California Institute of Technology, Pasadena, California, USA.

  3. Vatche Vorperian, “Resonant Converters”, PhD thesis, California Institute of Technology, Pasadena, California.

  4. Slobodan Cuk, R.D. Middlebrook, “Advances in Switched-Mode Power Conversion”, Vol. 1, II, and III, TESLAco 1981 and 1983.

  5. Stephen Freeland, “ I. A Unified Analysis of Converters with Resonant Switches II. Input -Current Shaping for Single Phase Ac-Dc Power Converters”, PhD thesis, October 20, 1987, California Institute of Technology, Pasadena, California, USA.


Here only a brief summary of the Power Factor and its significance is given as the more detailed account can be found elsewhere [2].

When the load resistor R is placed directly across the utility line such as shown in Figure 2a, the sinusoidal line current iAC drawn is directly proportional to and in phase with the sinusoidal line voltage vAC as illustrated in Figure 2b so:

iAC (t) = vAC ( t) /R (1)

For the most efficient and distortion-free operation of the utility line voltage, all loads attached to the utility line should behave as an effective resistance R often called “emulation” resistance. However, many loads, such as electronics equipment, computers, and other appliances operate from the dc voltage requiring an ac-dc conversion. The simplest Single-stage ac-dc converter is the four-diode bridge rectifier shown in Figure 3a, with large capacitor C across the load resistor R placed now on output dc side. This, in effect, nonlinear load draws the line current only during the peak of the sinusoidal line voltage resulting in a “peaky” input line current shown in Figure 3b. This “peaky” line current generates many current harmonics comparable in magnitude to the fundamental harmonic current at line frequency such as illustrated in Figure 3c. However, only the harmonic current at the same frequency as the line frequency and in phase with the line voltage (in this case fundamental harmonic at line frequency) as in Figure 2b contributes to the average power, P, delivered to the load. All other harmonics at multiple of the line frequency only increase the current demanded from the utility that is increasing losses, without contributing any actual (active) power to the load.

Power Factor is then a simple number, which describes the deviation from the ideally desired condition of ac line current being proportional to ac line voltage and is defined as:

Power Factor (PF) = P / Vrms Irms (2)


P = Average load power expressed in units of watts (real power)

Arms = RMS (root-mean-square) voltage

Rims = RMS (root-mean-square) current

Vrms Irms = Apparent power expressed in volt-amperes (VA) instead in watts (W).

For the load resistor R directly across the ac line voltage as in Figure 2a:

PF = 1 (3)

R is given in terms of rms quantities as:

R = Vrms /Irms (4)

Therefore, the ideal conditions for the utility line is to have a unity power factor as in Equation (3), which is identical to the statement that the line current is proportional to the line voltage as expressed in the time domain in Equation (1).

Note that the bad power factor of 0.5 for the case of a nonlinear load of Figure 3a results also in large harmonic current content as shown in Figure 3c, displaying the magnitude of higher order harmonics (third, fifth, etc.) currents normalized with respect to the magnitude of the fundamental harmonic at line frequency. The direct consequence is that the higher order harmonics will simply increase the line current magnitude without contributing to the active power, P, to the load.

Thus, for the case displayed in Figure 3a, the only variable left in power factor definition of Equation (2) is the line current. I, since line voltage, V, is fixed by utility generators to 120V. Clearly, the higher the current, I, drawn by the utility line for the given average power delivered to the load, the lower the power factor (PF). The ac-dc converter in Figure 3a operating from 120V AC line voltage and delivering 600W of power to the load while drawing 10A of the line current has a PF = 0.5. However, the resistive load with power factor of 1.0 of Figure 2a drawing 600W from utility 120V line draws only 5A from the line. Clearly, the utility line suffers from the low power factor of the loads in two fundamental ways:

It must provide higher generating capability to support increased line current demand in case of poor load power factor, yet it charges the customer only for the average power in Watts delivered and not volt-amperes (VA) generated.

The generated high harmonics currents placed on the utility line cause major disturbance to other users of the same utility line. This is a reason why the regulations define the maximum harmonic current content allowed for a given power level.

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