Power Electronics

Quantifying Harmonic Distortion in Nonisolated Boost PFCs

A detailed analysis of the total harmonic distortion for a nonisolated boost topology with average current-mode control using the UC1854A and the UCC3817.

Many continuous-conduction-mode PFC controllers use a nonisolated boost topology with average current-mode control. Examples of such controllers are the UC1852, UC1854/UC1854A/UC1854B family and the UC2817/18. These devices create a reference current source, IAC, used as the reference current for the average current-mode control. Fig. 1 shows the schematic of a PFC circuit. The input current is a function of the IAC current as it is applied in the following function within the PFC controller:


VAO = Output of the voltage-sensing amplifier

VFF = Scaled and filtered version of the input voltage

IAC = Current reference.

Ideally, IAC is a scaled replica of the rectified input voltage. This ultimately is the waveform that the current signal will follow.

RMOUT = Terminating resistance for the multiplier output current.

RSENSE = Input-current sensing resistor.

VFBR = Forward voltage of the input rectifier diodes.

VRMS = The AC input voltage.

VFF is used to stabilize the voltage-loop gain against input-voltage variations.

Conduction of IAC begins when the AC input voltage exceeds the sum of two bridge-rectifier diodes and the voltage at the IAC pin, VIAC. The IAC pin is different for each controller, ranging from as low as 0.5 V for the UC1854A/B, to a high of 6 V for the original UC1854. This conduction angle can be determined based on the input voltage as assumptions:

VFBR = 0.75 V


RIAC = 736 kΩ

PRMS = 250 W

VIAC = 1.4 V.

Solving for θ

Thus, this is the angle at which current just begins flowing through RAC. The instantaneous current is then defined by:

for angles from θ to π-θ and from θ+ to 2π-θ.

Due to the symmetrical nature of the waveform in both x and y directions, the Fourier coefficients can be evaluated within a single quadrant, using only A coefficients.

Then, the peak magnitude of any harmonic from the fundamental to infinity can be determined.

A(1) = 1.5831 × 10-4

A(2) = 0

A(3) = 1.67082 × 10-6

The Total Harmonic Distortion (THD) for any number of harmonics also can be determined. For example, evaluating the THD up to the 13th harmonic:

DistIAC = 1.406%.


Under this particular operating condition, the THD is 1.4%, based solely on the forward voltage of the input rectifier diodes and the voltage at the VIAC pin. Fig. 2 shows the schematic of the input full-bridge diodes. Individual harmonics can be evaluated as well.

In Table 1 (page 30), the SPICE Fourier analysis results show that the THD is 1.54%.

These results show that the majority of the THD is from the 3rd through the 9th harmonic, which is generally difficult to filter, while the higher order harmonics are generally filterable. There are no even harmonics.


In addition to the full-bridge diodes, the ripples at the VAO and VFF pins of the IC chip also introduce distortion into the system. The ripple at VAO is a function of the error amplifier frequency compensation. The VFF or VRMS ripple is a function of the specific controller. For example, the UC2817 uses an internal circuit to create the VFF signal with the addition of only a resistor and a capacitor. The UC1854A requires many additional components. The ripples at VAO and VFF are assumed to be 30 mV and 20 mV, respectively, based on simulation results. For the purposes here, the THD is therefore:

VAO = 2.1 V



K1 = 0.018

RMOUT = 4020 Ω

RSENSE = 0.15 Ω

The distoration, including the VAO and VF terms, is defined in Eq. 7 (in box).

DistIAC = 2.09258%.

Now, the THD due to the full bridge, VAO, VFF, RSENSE and RMOUT is 2.09%.


The next source of distortion is a result of the maximum duty cycle of the boost converter. The continuous-conduction transfer function of the boost topology is:

In the boost converter PFC, the output voltage is a constant, while the input voltage changes in accordance with the sinusoidal signal. The minimum input voltage for the controller to regulate occurs at maximum duty cycle. Assuming 97% maximum duty cycle,

VOUT = 380 V

DMAX = 0.97

VIN = VOUT(1-DMAX) (Eq. 9)

VIN = 11.4 V.

The minimum input voltage for operation is 11.4 V. Therefore, the conduction angle due to the maximum duty cycle is:

See Eq. 11 in box.

θ = 0.10752°

Now, the total harmonic distortion due to full-bridge diodes, VFF /VAO ripples, RMOUT, RSENSE and maximum duty cycle can be reformulated as shown in Eq. 12 (in box).

The final THD for the system is 2.85%.


Referring to Fig. 3, the VAORIPPLE is a function of C7 along with R2 and R19. The pole created by R7 and C7 is approximately 10 Hz, so that the VAORIPPLE equals:

R2 = 499 kΩ

R19 = 499 kΩ

C7 = 0.15 µF

For the output capacitor current:

IOUT = 250/380 A

COUT = 250 uF

F = 60 Hz

C(1) = 0

A(2) = 0.65789

A(1) = 0

B(2) = 0

B(1) = 0

The ripple voltage at the output capacitor, or any harmonic, is shown in Eq. 17.

The VAO ripple at twice the line frequency, n=2, is calculated to be:

Then, we can solve VAO as a function of operating point (input voltage and output power):

DMAX = 0.97

POUT = 250 W

K = 115

VAO = 2.2 V

F = 60 Hz

COUT = 250×10-6

C7 = 0.15 µF

RFF = 30 kΩ

CFF = 2.2 µF

VRMS = 85 V.

The nominal THD of the application circuit shown in Fig. 4 is calculated to be 2.49% using the equations derived in this article. The THD result form a SPICE simulation is 2.54%. These results are very close and the differences are primarily due to the nonlinearity of the input rectifier diodes, which is not included in the equations for simplification.

DistIAC = 2.49237%

Fourier components of transient response IAC

DC component = 1.119095E-03.

Typically, the range of maximum duty cycle of the UCC3817 is from 93% to 99% according to its data sheet (see Table 2).

The maximum duty cycle is the major contributor to the THD. The maximum duty cycle alone can increase the THD by more than 100% when DMAX changes from 97% to 93%.

0 0 2.90541e-009 0 0 0 0
1 60 0.000115736 179.802 179.802 1 0
2 120 5.80794e-009 93.6039 93.6039 5.01826e-005 -86.198
3 180 1.3533e-006 -2.0727 -2.0727 0.0116929 -181.87
4 240 5.80859e-009 97.207 97.207 5.01882e-005 -82.595
5 300 7.99073e-007 -3.1959 -3.1959 0.00690427 -183
6 360 5.80877e-009 100.81 100.81 5.01898e-005 -78.992
7 420 5.63648e-007 -3.9129 -3.9129 0.00487011 -183.71
8 480 5.80895e-009 104.413 104.413 5.01913e-005 -75.389
9 540 4.33166e-007 -4.0928 -4.0928 0.00374271 -183.89
10 600 5.80912e-009 108.016 108.016 5.01928e-005 -71.786
11 660 3.49991e-007 -3.6379 -3.6379 0.00302404 -183.44
12 720 5.80935e-009 111.619 111.619 5.01948e-005 -68.183
13 780 2.92229e-007 -2.4967 -2.4967 0.00252496 -182.3

Table 1. THD is slightly higher than the MathCAD calculation due to the nonlinear characteristics of the diodes model.

93 6.799
95 4.064
97 2.492
99 2.132

Table 2. For 85 VRMS input and 250-W output power, the relationship between maximum duty cycle and total harmonic distortion as derived from MathCAD calculations.

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