By John Woodward, Executive Business Manager, Industrial Power Business Unit, Maxim Integrated
Feedback-control schemes for linear systems have been around since at least the 17th century, regulating pressure and distance between millstones and then, famously, to control James Watt’s steam engines. These earlier techniques apply to the control of today’s linear voltage regulators.
Currently, switching technology is the preferred option for power conversion. As such, we need to consider controlling output voltage, typically with pulse-width-modulation (PWM) techniques. In this article, we’ll look at three common control methods, along with their pros, cons, and implementations: constant on-time, voltage mode, and current mode.
Constant On-Time Control
Perhaps the simplest control method used in a buck-converter circuit, constant on-time provides bursts of energy for fixed periods to the output. The repetition rate of the bursts is varied to keep output voltage constant. In Figure 1, a one-shot, or monostable, gives the fixed-length pulse, causing current in the output inductor to rise linearly from its average dc value, charging the output capacitor. After the pulse, the capacitor voltage drops.
1. Constant on-time control is the simplest control scheme used in buck converters.
By initiating the next on-pulse when the voltage drops below a reference value, we can effectively regulate the output voltage, with light loads producing longer off times. The circuit acts like a power oscillator with its positive feedback, so it’s sometimes called a “bang-bang” or “ripple” regulator. Because of the variable off-time, the circuit inherently has a variable frequency.
As there’s no negative feedback, loop compensation isn’t needed and the circuit can react immediately to load changes. Also, because of the low-frequency operation at light loads, efficiency can be high across the load range.
Downsides of the circuit, apart from the variable frequency, are that the circuit does depend on voltage ripple being present. Therefore, a compromise has to be met with low enough ripple for the load, but high enough so that the control comparator isn’t affected unduly by switching noise. There’s also no inherent overload protection—with excessive load, the frequency just increases further, which adds to switching losses. For this reason, a minimum off-time limit is usually formed by the block in the figure labeled “min off.”
This mode operates usually at fixed frequency with PWM. In Figure 2, the output voltage is compared with a reference; an error signal VE is generated that directly controls the width of the on-time pulse from the power switch. It’s a linear negative feedback loop that’s bandwidth-limited to avoid instability, so at least switching frequency noise is filtered out.
2. Voltage-mode control typically operates at fixed frequency with pulse-width modulation.
However, in a buck converter with its LC output filter, there is a 180-deg. phase shift in small signal response above its resonant frequency, which might be only a few hundred hertz. This, coupled with the inherent 180-deg. shift of a negative feedback loop, gives us 360 degrees of shift, leading to certain instability if there is any loop gain at that frequency. This would force us to roll off the gain in the error amplifier at such a low frequency that the loop would be painfully slow.
In this scenario, the output capacitor ESR comes to the rescue—in part because above the corner frequency of the capacitance and its ESR, the ESR dominates so that the output circuit turns into an LR network, which has less phase shift than an LC. This enables the loop bandwidth to be usefully extended. The problem returns, though, when designers try to use ceramic output capacitors that have virtually no ESR.
In any case, the error amplifier needs careful tailoring of its frequency response to get the best loop speed and output accuracy.
We’ve been considering buck converters, but the technique can be easily used in other topologies as well, such as boost, buck-boost, and all types of isolated converters except push-pull circuits.
Cecil Deisch of Bell Labs is credited with inventing current-mode control initially to prevent “staircase saturation” of transformers in push-pull circuits found with voltage-mode control. It was quickly realized, though, that the technique could be applied to most converter topologies to good effect.
Figure 3 shows the implementation. It’s similar to voltage mode except the sawtooth ramp isn’t separately generated; it’s derived from the inductor current ramp during the switch on-time. This means that we’re turning the switch off when a particular peak current is reached and on again with a clock signal.
3. Current-mode control is similar to voltage mode except for the fact that the sawtooth ramp is derived from the inductor current ram during switch on-time.
This scheme has several benefits. For one, the output filter is now driven from a controlled current source, which makes it a “single-pole” response. This has just 90 deg. of phase shift above its corner frequency, allowing for much higher loop bandwidth before the overall phase delay reaches 360 deg. The error-amplifier compensator network becomes much less critical and can be more easily integrated into control ICs.
The peak current is directly sensed so that switch current can be limited to a safe value with overloads on a pulse-by-pulse basis. This can allow the designer to work closer to the magnetic saturation limit of the inductor, knowing that there’s a quick current limit available.
Lastly, there is an automatic “feed-forward” mechanism that directly controls the pulse width for changes in input. In a voltage-mode circuit, you have to wait for an input voltage change to propagate through the power stage to the output and back through the error amplifier before it’s corrected. In current mode, an input voltage change directly affects the slope of the inductor ramp according to:
A higher input voltage produces a faster ramp, getting to the switch-off threshold sooner and giving a shorter pulse, which is just what you want to correct for the higher voltage. Line regulation is, therefore, very good in current-mode-controlled circuits.
Another benefit of current-mode control is load-current sharing. If the same error signal VE is applied to several identical converters, then the peak currents of the converters are maintained equal and, by extension, the average currents of the converters are also equal.
There has to be a downside, of course. If the circuit is operated above 50% duty cycle, an effect called “sub-harmonic oscillation” occurs, which can appear to be caused by “gain peaking” of the current loop at half the switching frequency. This manifests itself as alternate narrow and wide power pulses. The fix is quite simple, though—the ramp slope from the inductor current is artificially increased by adding in a ramp derived from the system clock. It works out that increasing the sensed current slope by a value greater than half of the downslope of the inductor current does the trick. More is not better, however, as too much slope compensation turns the loop back into voltage mode.
Current mode works well in all topologies except “‘half bridge,” which needs extra complexity to avoid runaway imbalance in the series bridge capacitors.
Poles Apart – a Reminder
In control loops, we talk about “poles” and “zeros.” These are maxima and minima of a transfer function occurring at particular frequencies, and represent “turning points” in a plot of gain versus frequency.
The voltage- and current-mode schemes need error-amplifier frequency response tailoring or “compensation” to guarantee stability and get the fastest, most accurate control of output voltage. Over the years, three schemes have covered all practical applications called type I, II, and III. The type number corresponds to the number of poles in the error-amplifier response.
Figure 4 shows the arrangements. You might recognize the type I compensator as an integrator with a gain that drops at 20 dB/decade from its maximum value at dc. The phase shift is a constant 270 deg. (90 deg. integrator plus 180 deg. from the op amp). The circuit would keep some loops stable, but with very poor loop bandwidth.
4. Error-amplifier compensation circuits generally come in three flavors—the type number corresponds to the number of poles in the error-amplifier response.
Type II compensators are used in current-mode converters and have two poles and one zero. Like type I, there’s a pole at 0 Hz, but a zero that you place at the lowest frequency at which the single output filter pole appears. This “cancels” the phase shift caused by the pole and adds gain to stop the −20 dB/decade gain roll-off caused by the 0-Hz pole. The effect of this is to extend the useful bandwidth of the loop. A final high-frequency pole ensures that the gain turns down again before the overall loop phase shift reaches 360 deg. with some margin.
The last compensator, type III, is used for voltage-mode control, where the double pole of the output filter introduces a steep −40-dB/decade gain roll-off in the power-stage transfer function with a rapid phase change of −180 deg. The compensator has two zeros that are placed again to cancel the two output filter poles. The 0-Hz pole and two high-frequency poles are placed to keep gain high and minimize phase delay to as high a frequency as possible. With so many variables to play with, different pole-zero placement schemes can be devised to optimize results under differing conditions.
Using these techniques, the loop can have useful gain and bandwidth up to about a tenth of the switching frequency. Any higher than that and switching noise can creep in and cause problems. To learn more about this subject, watch this video "Introduction to Control Algorithms in Switching Regulators" from Bob Mammano, the father of the first switch-mode power supply:
Mammano hosts a Power System Design Seminar video series to help you increase your expertise in designing smaller, simpler, cooler power designs.