Power Electronics

# Transient Response Counts When Choosing Phase Margin

An analytical derivation of the optimum converter phase margin for critically damped response shows it is close to 76 degrees, well above the traditional recommendation of 45 degrees.

The design of a closed-loop switch-mode power supply creates a path between the variable a designer wants to monitor and the control pin of the designer's converter. This control pin can be the peak current setpoint in a current-mode power supply or the duty-cycle input of a voltage-mode controller. If the monitored variable deviates from its imposed target, the controller reacts by either increasing or decreasing the delivered power to the load via an amplified error signal fed to its control pin. However, frequency-dependent gain and phase (H(s)) affect the power stage.

To ensure that the power supply behaves as specified, the designer must shape the return path (G(s)) to compensate for the power-stage response at certain frequency points. Among the important parameters are:

• DC gain for the smallest static error and the lowest output impedance

• Crossover frequency for the required response speed.

At the crossover point, where the loop-gain module (T(s)) equals 1, the phase rotation affects the returning signal. If the signal returns in phase with the control signal, these are the conditions that create an oscillator, which is something one wants to avoid. To make sure the signal does not return in phase (i.e., with a 360-degree phase rotation), a designer must plan a certain amount of margin between the phase rotation of T(s) at the crossover frequency and the 360-degree limit, which is the phase margin. How much phase margin should one ask for to provide performance and stability? Textbooks often suggest 45 degrees. Should designers try to get more than that? Let us analyze how much.

### Second-Order System

Fig. 1 shows a LC low-pass filter where the resistor (R) represents the network losses. This architecture could be seen as a simplified lossy output filter of an unloaded buck converter. In that case, the input voltage (VIN) is the average level of the square-wave signal present at the power switch/freewheel diode cathode junction. For the purpose of this analysis, this average voltage will be ac modulated, and we are looking for the expression of the output voltage across the output capacitor. The transfer function, H(s) = VOUT (s)/VIN (s), of this structure will then be calculated.

Using Laplace notation, Eq. 1 describes the transfer function of this RLC network:

By rearranging the expression, one can identify the quality coefficient and the resonant frequency:

where ωR is the resonant frequency:

The idea now is to evaluate the response to a 1-V input step and change the quality coefficient values by tweaking resistor R1. This resistor is representative of the losses in the network such as the equivalent series resistance (ESR) of the inductor. In Fig. 1, the calculation is automated of R, whose value is evaluated according to the selected quality coefficient. One also could multiply Eq. 1 by 1/sec and calculate the inverse Laplace transform to obtain the temporal response. In this case, a SPICE simulation is faster. The results appear in Fig. 2.

As one can see, low coefficient values lead to a completely oscillation-free response, whereas values above 0.5 give birth to overshoots. As the quality coefficient increases, meaning fewer losses, the overshoot gets larger. If the quality coefficient would go to infinity, it would imply an undamped LC network, keeping oscillations going further to an excitation.

### Looking for Roots

A study of Eq. 2's denominator reveals the roots for which H(s) goes to infinity. Mathematically, it corresponds to:

In Eq. 7, the term under the square root can either be positive or negative, depending on the quality coefficient value. For values below 0.5, the so-called overdamped case, the term under the square root remains positive and both roots s1 and s2 are separated real roots.

The step response is sluggish, as shown in Fig. 2. When the quality coefficient reaches 0.5, called the critically damped case, the roots are still real but are now coincident. The step response is much faster, but still does not exhibit overshoot.

Now, if the quality coefficient grows further, this is an underdamped case and the roots welcome an imaginary portion that increases as the quality coefficient goes up. This results in a fast-step response now featuring overshoot and oscillations.

If the quality coefficient reaches infinity, the real portion of roots s1 and s2 fades away and the system freely oscillates. This means there is no more damping (losses) brought by the real terms. Analyzing the trajectory of these roots is called root locus analysis. Such an analysis shows how the roots are positioned in the s-plane and give an indication of how they move relative to some parameters.

Keep in mind that it is Q in this example here, but it could be the gain k of a system where, at some point when k increases, the roots migrate in the right-half plane and cause instability. Fig. 3 describes the path taken by s1 and s2 as the quality coefficient changes.

### Approximation of an Open-Loop Response

Based on what has already been disclosed, it would be interesting to model the closed-loop dc-dc converter with an equation where a quality coefficient term would appear. That way, a designer could select the parameter that affects this quality coefficient to shape the output response he or she is looking for: a response that is slow but without any overshoot, or vice versa, a response that is faster but accepts a little overshoot. Let us start the derivation process by looking at Fig. 4.

Fig. 4 shows the complete loop gain T(s) made of the converter power-stage transfer function, H(s), further shaped by the compensator transfer function, G(s). The example here is dealing with a continuous-conduction mode (CCM) buck converter operated in voltage-mode control. In this figure, concentrate on the area around the crossover frequency, which represents one important design parameter of the dc-dc converter trying to be stabilized. Asymptotically looking at the curve within the frame reveals the effects of an origin pole (ω0) and a high frequency pole (ω2). Mathematically, this approximation is:

In this approximated expression, extra poles and zeros are considered far away from the crossover frequency, naturally limiting their impact on the transfer function. However, what is interesting is the response the dc-dc converter delivers once its loop is closed. In other terms, let us identify the closed-loop transfer function derived from Eq. 8. To obtain the closed-loop expression, evaluate:

Eq. 9 is similar in form to Eq. 2. Therefore, it can be put under the familiar form of a second-order system as described in Eq. 10:

The identification of the quality coefficient and the resonant frequency is straightforward:

There is now an equation that describes the approximate closed-loop response of the dc-dc converter and it includes a quality coefficient. The next step is to establish a relationship between the closed-loop quality coefficient and the key design parameter, the open-loop phase margin. First, based on Eq. 8, calculate the crossover frequency determined by the location of the origin pole and its associated high frequency pole. At the crossover point, it is known that the T(s) module equals 1; therefore:

Extracting ωC and rearranging this equation gives:

If Eq. 12 is substituted into Eq. 14, a quality coefficient-dependent crossover frequency can be obtained:

Eq. 15 shows how the closed-loop quality coefficient and the open-loop crossover frequency are linked. It is important for this remark to be well understood: Q represents the resulting closed-loop response quality coefficient based on the open-loop pole/zero arrangement describing the approximated open-loop compensated transfer function in Eq. 8.

To continue further with this analysis, evaluate the phase rotation of T(s) at the crossover frequency:

The phase margin represents the distance between the total phase rotation at the crossover frequency as given by Eq. 16 and the -180-degree limit. In this case, the phase reversal brought by the operational amplifier is purposely neglected. Hence:

Recalling those “far, far away” trigonometric classes, this means:

Thanks to Eq. 19, Eq. 16 can be updated as:

The crossover frequency versus the closed-loop quality coefficient were already defined in Eq. 15. To capitalize on the definition in Eq. 20:

The next step is to extract the closed-loop quality coefficient from Eq. 21 and simplify the result:

This means there is now a relationship between the main design criterion, the open-loop phase margin and the quality coefficient the loop will exhibit once closed. The best thing to do is to explore the various quality coefficients that different phase margin choices will bring (Fig. 5).

If one wants to combine speed and a lack of overshoot, Fig. 2 suggests a quality coefficient of 0.5. Reading the corresponding phase margin in Fig. 5, it can be seen that a design criterion of 76 degrees satisfies this request for such a quality coefficient, far away from the 45 degrees recommended in the majority of textbooks.

What does it mean then? In the response to a load step, once the loop is closed, the open-loop phase margin mostly affects the recovery shape and a little of the undershoot depth. Therefore, it really depends on the kind of response a designer is looking for or what the customer specifications impose on a design.

If a designer needs a fast recovery and a little overshoot to be acceptable, then reducing the phase margin can be an option. On the contrary, if absolutely no overshoots are tolerated, the designer has no choice but to increase the phase margin to the detriment of the recovery speed.

Whatever solution designers selects, they have to make sure that — whatever the operating conditions, input/output, temperature and normal parametric variations (ESRs for instance) — the phase margin never goes below 45 degrees. In other words, shooting for a typical value around 70 degrees should become a good design practice.

### Transient Response and Phase Margin

The buck converter in this example uses one of the automated simulation platforms described in another paper.[1] The technique allows designers to keep the same crossover frequency while only working on the phase margin. The overall shape is the same as that presented in Fig. 4 with a 10-kHz crossover frequency. The output is subjected to step ranging from 1 A to 2 A in 1 µs. The results appear in Fig. 6. The 76-degree phase margin gives a little overshoot of 0.05%, whereas the 45-degree margin triples that overshoot, still reasonable though given the vertical-axis scale of 20 mV/division.

However, one can observe a faster recovery in the 45-degree phase case (70 µs) versus the 76-degree case (227 µs). Why do designers still have overshoot with the 76 degrees when theory states there should be none? It is because Eq. 8 is a simplified view of the transfer function in the vicinity of the crossover frequency. If a designer has three or more poles installed near the crossover frequency, the quality coefficient factor approximation done here does not work anymore and extra work will be required.[2] Nevertheless, as exemplified by Fig. 6, a small phase margin leads to a peaky closed-loop response.

### References

1. Basso, C. Switch Mode Power Supplies: SPICE Simulations and Practical Designs, McGraw-Hill, 2008.

2. Erickson, R. and Maksimovic, D. Fundamentals of Power Electronics, Kluwers Academic Press, 0-7923-7270-0.