Power supplies in servers, storage and telecom systems often employ redundant topologies. This means that multiple supplies connected in parallel provide the system power. If one supply fails, the remaining supplies have more than enough capacity to carry the burden, ensuring system power continues uninterrupted.
It is necessary to ensure that power supplies connected in parallel contribute equally to powering the system. A dedicated bus, commonly known as the share bus, is used for power supplies to communicate with each other. The traditional approach is to use an analog share bus, but many advantages can be realized by migrating to a digital approach.
Analog Devices is proposing its own implementation of the digital share bus as an open-industry standard. By offering this standard via a royalty-free license, the company hopes to encourage its adoption, while also fostering the development of compatible digital power solutions.
In server-based computer systems, the demand for uninterrupted operation — known as high availability — is critical because any downtime in the system can heavily impact the productivity of a company or service. Redundant power systems ensure that power delivery is maintained at all times to the system load by paralleling power supplies, so if one unit fails, the others will continue to provide sufficient power to the load.
Accurate current share is also an important factor for system reliability. If power supplies in a redundant system are not sharing their power contribution equally, one will be subjected to more stress than the others. This will manifest itself as higher temperatures, which can lead to long-term reliability issues. Power supplies that share more equally will have improved reliability and longer operating life. Accurate current sharing also prevents hot spots from developing in the system, which means that cooling techniques can be a lot easier and cheaper to implement, and failures are much less common.
Analog Share Bus
The analog share bus has been widely used in power supplies, and has been around for at least 25 years. Although the analog share bus has taken many forms, the one most widely used in redundant applications is the active share bus (Fig. 1). With this bus, each power supply (or unit) attempts to force a voltage onto the share bus that is proportional to the current that the power supply is delivering.
The unit that outputs the highest voltage onto the share bus controls the bus. Each unit also senses the voltage that is present on the share bus and compares it to the voltage it is trying to output. Any unit that senses another unit is controlling the bus will try to increase its power delivery so that it matches the unit that controls the bus. When the share-bus voltages of all units in the system get to within 5% (typically) of each other, then the system is sharing correctly.
A load line is typically used to specify the sharing algorithm, as illustrated in Fig. 2. Generally, there is an offset and slope defined for the system. A major hurdle for power-supply companies is that this specification can vary from customer to customer and even from design to design. This means that power supplies are often incompatible. An offset is necessary because the analog amplifiers run into difficulties measuring and controlling voltages near their supply and ground rails.
A digital share-bus topology is shown in Fig. 3. The digital share bus takes a similar control approach to the analog share bus. However, the main difference is at the communication level.
Each power supply outputs a digital word (rather than an analog voltage) that is proportional to the current that the power supply is delivering. The current-sense element remains the same, using a sense resistor or current transformer to determine a voltage drop. This measured voltage is digitized through an analog-to-digital converter (ADC).
The bigger the word generated by the ADC, the bigger the current that unit is delivering to the load. Each unit senses the word that appears on the bus and compares it to its own word. This comparison is performed in a bit-by-bit routine, starting with the most significant bit (MSB). Once a unit senses that its word is smaller than the word on the bus, it knows that it must increase its contribution to the system load.
The digital word is 8 bits long, and is a value that is relative to the full-load current of the system. For example, a unit that outputs 00h is delivering 0% of full-load current to the system load. A unit that outputs FFh is delivering 100% of the current to the system load.
The digital communications is based on a 1-wire bus model. The clock of the bus is modulated on the data line, as shown in Fig. 4. Logic “1” is defined as a low-high transition at the start of the bit and a high-low transition at 75% of the tBIT. Logic “0” is defined as a low-high transition at the start of the bit and a high-low transition at 25% of tBIT. Due to the open-drain output configuration, the actual signal on the share bus is inverted.
The timing frame that represents the current information consists of three components, 1 start bit (always logic “0”), 8 data bits and 2 idle bits (for synchronization). The tBIT of a single bit is about 10 µs and the repletion frequency of the whole word is about 10 kHz. Fig. 5 shows the timing frame.
To start up, any unit can start writing to the bus when the bus has been idle for at least 2 bits. The first unit to detect idle will begin the current share frame, and all other units will synchronize at this moment. After the first start bit, all units synchronize to the device with the fastest clock.
Units can be hot-plugged onto the share bus. The hot-plugged unit cannot write to the bus until it has detected 2 stop bits. If the controlling unit is unplugged in the middle of word write, then the bus becomes idle. The first unit to sense the idle (~20 µs) period then writes to the share bus and the share procedure is re-established. During hot-plug, the value on the share bus may not be the right value for one data frame.
An example is given where Unit A is already connected and delivering 90-A current to the load. Unit B is connected to the load at this time. In Part A of Fig. 6, it can be seen that Unit A has a larger digital word than Unit B. Unit B needs to increase its output current to try and match the contribution of Unit A, whose word gets placed on the bus.
In Part B of Fig. 6, Unit B has increased its output current, and hence its digital word has increased. Since both units now output the same digital word, they are delivering the same power to the system.
Digital Share-Bus Advantages
Noise and interference are big concerns when implementing a share bus. A switching power supply is a very noisy environment, and the growing power density of new designs (greater than 20 W/in3) only serves to increase the likelihood of noise interference in the future, as these power densities get higher. Also, the bus needs to be routed to connect all units together, making the layout noise sensitive.
The ground reference for a share bus is typically connected to the remote ground rail of the system load. This can be a noisy ground rail, subject to a lot of interference, especially in a high power system with several switching power supplies. Any noise on this ground rail couples directly into the share bus. Since an analog share bus measures relative voltages, this noise leads to errors in reading the share-bus voltage. Since a digital share bus is looking at timing edges rather than voltages, it is much less susceptible to noise on the ground rail.
Higher-frequency noise takes the form of glitches and can couple onto the bus from several sources within a power supply. Since the digital share bus uses a digital word, it is effectively immune to glitches. Glitches on the ground rail are dealt with by integrated digital debounce circuitry, which can filter out high-frequency noise. Glitches are typically of the order of tens of nanoseconds, whereas the clock frequency of the bus means that signals are 10 µs.
Additional share-bus advantages include:
Using a digital controller allows the bandwidth to be set digitally. This means that reuse of hardware is possible, as only a software change is needed to change the bandwidth. The traditional analog share-bus bandwidth is set by an RC combination and is inflexible compared to a digital approach. The analog share bus needs to be designed so that there is no instability in the control loop. The digital share bus does not suffer from any oscillation issues, as it relies on a communication protocol.
Trimming the analog share bus can be a tricky exercise. Several errors due to resistor and amplifier inaccuracies need to be calibrated to remove any error. These errors can be interdependent, so a straightforward calibration is difficult. After this is complete, the loadline offset and slope still needs to be calibrated to ensure correct operation between units.
In contrast, the digital share-bus topology has fewer error variables than the analog share bus, making it easier to calibrate. An automatic calibration algorithm can be performed on the digital share bus. The lack of an offset and loadline slope mean that no further calibration is necessary to ensure correct operation between units.
Digital circuitry can be a lot less susceptible to temperature variations than analog circuitry. This is an important factor in high-density power supplies, where high temperatures are a normal operating condition due to high power densities.
Another major issue is the analog share bus has never had a widely adopted industry standard. While some share-bus systems operate at 8 V for full-load current, there is no consensus on this. The slope, offset and peak voltage of a share bus are open to individual interpretation. This leads to compatibility problems for end users and power-supply manufacturers, as only units with matching share-bus specs can be connected together.
Moving to a digital share-bus topology is a great opportunity to set an agreed-upon industry standard. That would allow power supplies from different manufacturers to be used together more easily. A standard specification also means that legacy issues would not exist moving forward.
As mentioned, 8 V is a common choice for share-bus voltages. This requires generating 8 V or higher for correct operation. As redundant power supplies get more sophisticated and dense, more functionality is realized by ICs rather than discrete circuits. IC fabrication processes get more expensive when higher voltages are involved. And even cost-competitive IC solutions that operate from a 5-V (or lower) supply will need external components to realize an 8-V share bus. This results in higher cost and the need for extra external components to realize the share bus.
Therefore, the majority of today's share-bus designs are made from discrete components. This is the very trend that the industry is trying to move away from because of reliability, size and cost pressures. A digital share-bus solution can operate from 3.3 V, which means a digital current share circuit can be realized on a cost-effective IC fabrication process. Due to the nature of the open-drain design, it can be realized with only one external pull-up resistor on the bus to 3.3 V.
So, where does this fit in with relation to PMBus? The PMBus initiative (www.PMBus.org) is a collaboration within the power industry to obtain an open communications standard for power systems. It does not include a definition for the share bus, as the two functions are distinct from each other. The digital share-bus proposal has similar aims as PMBus, insofar as it aims to establish an open-industry standard. But it is aimed for the share-bus communication rather than system communication. The digital share bus described here has been proposed by Analog Devices, which can be contacted for a royalty-free license.
A Golden Opportunity
A digital approach to implementing the current share bus offers improved performance and cost, and a chance to introduce an industry-standard routine. The general trend toward adoption of digital power offers a great opportunity to make this migration.