A thin-film termination technology developed by AVX (www.avx.com) makes it possible to dramatically reduce the internal inductance of decoupling capacitors. Decoupling capacitors produced with this technology may offer their greatest benefit in package- and board-level decoupling for high-speed microprocessors, graphics processors, DSPs, and ASICs. However, the new decoupling caps should also be useful in board-level power supply applications such as isolated dc-dc converters (bricks).
AVX’s Fine Copper Termination (FCT) process offers a new method of applying the copper termination that’s required to build a multilayer ceramic capacitor (MLCC) or low-inductance variations such as the interdigitated capacitor (IDC) and the reverse-geometry multilayer ceramic capacitor (LICC). In the conventional manufacturing process, the copper termination is applied as a thick film paste, which may be on the order of 10 µm thick. However, in the FCT process, the termination is applied using a thin film technique, which produces a layer of copper that is about 3 µm to 6 µm thick.
The FCT process makes it possible to control the pitch or gap between capacitor terminals more precisely than with the thick film technique. Consequently, the gap between the terminals can be shortened.
AVX exploits this capability in its just introduced land grid array (LGA) decoupling capacitor. In developing this device, two strategies were employed to reduce equivalent series inductance (ESL). One is to reduce the length of the current loop formed when the device is mounted to the board and then use multiple parallel loops to reduce the net inductance of the capacitor. The latter idea is one that’s already used in the construction of the LICC. The second strategy is to break up the terminations on the long side of the device into segmented terminals of alternating polarity to form several parallel small area current loops. This is a technique employed in the design of IDCs.
But despite its similarities with existing capacitors, the LGA differs from them in fundamental ways. MLCCs, LICCs, and IDCs all have horizontally oriented electrodes and terminals located on the sides of the capacitors. On the other hand, the LGA employs vertically oriented electrodes and precisely spaced terminations located on the bottom of the device. These changes, which are made possible by the FCT process, shorten the current loops through the capacitor and the application’s pc board, lowering ESL. (see the figure)
Previously, designers seeking lower internal inductance were forced to go to smaller case sizes (and therefore lower capacitance values) or to use devices with multiple terminals such as the IDCs. But with the LGA, designers will be able to reduce their inductance in a given case size, which means they’ll get more capacitance with less inductance. Or in cases that previously required a multi-terminal IDC, a two-terminal device will provide equivalent ESL performance.
“The electrode configuration allows [current] loop areas to be greatly reduced,” says Mark Obuszewski, Business Manager at AVX. “Because of the current cancellation within the capacitor achieved by the new terminal structure, a relatively simple two-terminal LGA can have an inductance of only 35 pH.”
The LGA capacitor is available in 0204, 0306, 0805, 0508, and 1206 case sizes. Component thickness ranges from 0.5 mm to 1.5 mm in the larger case sizes. Board mounting trials at AVX and other sites have demonstrated that these parts are readily reflowed and the mechanical integrity of the LGA solder joint is equivalent or superior to those formed with conventional capacitor styles.
Pricing for the LGA decoupling capacitor starts at $0.12 in quantities of 10,000. Delivery on production orders is 10 to12 weeks. For more information contact Mark Obuszewski at [email protected].