Almost all off line switching power supplies over several kilowatts of output power use a three phase bridge rectifier. Typically, it comprises a six diode bridge and a DC bus filter capacitor. A proper selection of the filter capacitor is very important, since it affects power factor, input harmonic distortion and output ripple voltage. A very stringent European standard IEC 61000 3 12 for three-phase devices forces a total harmonic distortion (THD) of input current not to exceed 48% at input current range from 16A to 75A RMS per phase. For the lower power devices, up to 16A per phase, even more stringent standard IEC 61000 3 2 limits the input current distortion level by a 33.8% of THD. Both values are true for the stiff power line, i.e. the input power line voltage waveform is supposed to be practically undistorted. It is a worst case scenario for the three-phase rectifier in terms of harmonic distortion and power factor.
A standard single phase bridge rectifier, working on a pure resistive load, without a filter capacitor, demonstrates an ideal 100% power factor and zero THD. On the contrary, the resistively loaded three-phase bridge rectifier shows only 95% of power factor and generous 30% of THD. A DC bus filter capacitor of any value further reduces the power factor and increases THD. Unfortunately, the switching power supply cannot operate without a bus filter capacitor, since a power inverter requires a low impedance DC voltage source both for a switching frequency and all its harmonics. It is necessary both for efficient power conversion and for low conducted emissions to a power line.
Fig. 1 shows a typical high power inverter circuit fragment , comprising an EMI filter, followed by a three phase bridge rectifier and full bridge IGBT inverter. A rectifier bus filter capacitor is composed of C1, C2, C3, C4 and C5 connected in parallel. Capacitors C3 and C4 are the IGBT module directly mounted snubber capacitors. They protect IGBT modules from dangerous voltage spikes during IGBT turn off. They have typical capacitance around 2µF, very low ESL, and high rated RMS ripple current. Capacitors C2 and C5 compose a DC bus energy reservoir for power conversion. They experience a high pulse discharge current twice per switching period. That current has somewhat similar waveform and amplitude as the inverter output current absolute value. Therefore, the total value of C2 and C5 should be large enough to avoid a large high frequency bus ripple voltage. Additionally, they must withstand very high RMS ripple current.
On the other hand, an unnecessarily large value of C2 and C5 results in poor power factor and non acceptable line input current THD. Inductors L1, L2 and capacitor C1 compose a symmetrical low pass filter for bus ripple voltage suppression. Resistors R1 and R2 dampen down parasitic oscillations on switching frequency harmonics. Like C2 and C5, C1 also contributes its value to the total bus capacitance from the input power factor and THD standpoint.
To determine a quantitative relationship between THD and circuit characteristics, at first let's define an important parameter M as:
Where Fline is power line frequency in Hz, Cbus is total bus capacitance in µF, Vline is input line to line RMS voltage in VAC, is inverter output power in W. Generally, the lower the M, the lower the THD, but the higher the high frequency ripple voltage on the bus capacitors. The table 1 shows calculated circuit characteristics as a function of M at a typical power inverter switching frequency 30kHz. In that table, the low frequency means six times line frequency, i.e. 300 or 360Hz. The high frequency means an inverter switching frequency doubled, i.e. 60kHz. Both types of the ripple voltage are superimposed on the average rectified line voltage. The table allows the power supply designer to find proper circuit components quickly and easily, avoiding complex math equations.
The simulated circuit operation waveforms at line voltage 208VAC, M=40000 (THD = 33%) and M=100000 (THD = 48%) are shown in the Figs. 2 and 3, respectively. The phase input current spectrum contains many odd harmonics of the line frequency, but only 5th, 7th, and 11th harmonics are noticeably contributing to a THD. The 5th harmonic is always the greatest contributor to a THD in all three phase bridge rectifiers.
A high frequency ripple voltage, induced by inverter current, causes two negative effects: conducted differential EMI and high RMS ripple current through bus capacitors C2 and C5. Therefore, those capacitors must be chosen to withstand that current. While the high frequency ripple voltage is inversely proportional to the inverter switching frequency, the bus capacitor RMS current is switching frequency independent; however, it is dependent of the power inverter topology used.
A power inverter, working together with a three-phase bridge rectifier, experiences very strong DC bus voltage-variation due to a superposition of low and high frequency voltage ripple. For example, if the power supply operates from an industrial three-phase 208VAC ±10% 60Hz power line at maximum allowed THD = 48%, the instant bus voltage may vary from 220V and up to 320V during operation. So wide bus voltage range negatively affects power inverter operation. Almost all practically used full bridge inverter topologies cannot generate inverter output peak AC voltage (a.k.a. power supply output voltage, reflected to the primary winding of the power transformer) higher, than a bus voltage. For this reason, the peak inverter output voltage has to be chosen lower than the lowest possible instant bus voltage. It results in a considerable inverter output and input peak current increase to keep the required level of the output power. That, in turns, results in lower power conversion efficiency and higher high frequency bus ripple voltage.
However, there are two known intrinsically buck/boost full bridge inverter topologies, which are free of that drawback. The first one is relatively well known LLC inverter and the second one is less known CLC inverter. Both can deliver the output peak AC voltage higher than bus voltage and both use a variable frequency control. A CLC inverter shows much lower switching power loss and lower high frequency EMI than LLC inverter; however, it contains an additional snubber capacitor across each IGBT in the bridge.
The high frequency voltage ripple data in the table above are figured out for LLC or CLC inverter topology. The chosen peak inverter output voltage equals average DC bus voltage at a nominal line voltage. That means it is greater than the lowest possible bus voltage, but lower than the highest one. A reasonable practical component choice for 25kW inverter, operating from a 208VAC line voltage, is 230µF 500V for C1, C2, C5 (ECI UL30 or similar type), 47µH 100A for L2, L2, 4.7â¦ 10W for R1, R2. In that example, M=100000 at full output power. Under these conditions, the conducted EMI level meets all industrial international requirements even with a simple single stage input EMI filter like that shown in Fig. 1.
International Standard CEI/IEC 61000-3-12:2004
A. Sokolov “100 kw DC/DC converter Employs Resonant π Filter”. Power Electronic Technology, Jan. 2009, p. 18 21.