Green transistors promise greener pastures for IC power consumption

Integrated circuits (ICs) consume significant amounts of power, so much so that the overall power that ICs account for has become an international problem. As server farms expand and more individual computers plug into the grid, ICs represent a fast-growing portion of worldwide electricity consumption. But researchers hope to mitigate this trend with a new “green transistor” dubbed the gFET that can operate at a much lower supply voltage (Vdd) than ordinary field effect transistors.

One pioneer of this effort is Dr. Chenming Hu, TSMC (Taiwan Semiconductor Manufacturing Co.) Distinguished Chair Professor of Microelectronics, University of California at Berkeley, whose work is being partially funded by Darpa. His proposed gFET is based on tunneling — that is, electrons moving across semiconductor junctions by quantum mechanical tunneling through an energy barrier rather than via conduction across the barrier. Hu says gFETs will “provide Ion and Ioff far superior to MOSFETs at 0.2 V, if suitable low-Eg (low bandgap energy) material is introduced into IC manufacturing.”

Michael Fritze, a program manager at Darpa's Microsystems Technology Office, believes gFET research holds much promise. “Research conducted as part of Darpa's ‘Steep’ (subthreshold-slope transistors for electronics with extremely-low power) program seeks to develop a novel CMOS-compatible transistor device that has the potential for significant power savings for ICs,” explains Fritze. “The UC Berkeley approach is based on a new type of switching mechanism — gated band-to-band-tunneling. Devices based on such a switching mechanism could operate at much lower voltages (far below 1 V) than today's transistors, thereby offering significant power savings, both active and standby. Given today's severe challenges with IC power dissipation, the development of such low-power-transistor concepts is important, timely, and green.”

Power crisis looming

As chip circuit density and switching frequencies have risen, power consumption per chip has climbed as well. To understand the ramifications of this, consider power dissipation in an individual transistor and chip interconnections. From Ohm's Law, power dissipation can be expressed as a function of supply voltage V and capacitive reactance, 1/2πfC. So

P = I × V

= V/Xc × V

= 2πfC × V2

where C is the total transistor and interconnect capacitance on a chip, and f is the average effective switching frequency of all elemental capacitances on the chip. Historically, f and C have both risen with increasing chip area. Capacitance per area has greatly increased due to thinner gate oxides and closer spacing between interconnect lines. Power density has remained manageable because supply voltage has been reduced from one generation to the next. There was a simple linear proportion between supply voltage and chip-feature size until about five chip generations ago. Then power densities began to climb dramatically. For example, chips with 32-nm features use 0.9-V supplies and have eight times the power density of chips made with earlier technologies. Worse yet, power density is 25 times greater on chips with 0.14-nm features.

“IC chips now consume about 2% of total U.S. electricity,” says Hu. “While this number may not seem alarming, everything about IC technology tends to double every few years. When IC consumption of electricity was, for example, 0.1%, these doublings didn't matter. Now they're alarming.”

Hu's tunneling green transistor is one possible solution to this looming power crisis. A point in the transistor's favor is that it uses geometries that scale to smaller features while using proportionally lower supply voltages. Hu and his team are also investigating an FET mode with germanium, which offers a smaller bandgap energy than silicon and is thus a promising candidate for tunneling effects.

“Output conductance is excellent because the device's current-controlling region, the tunnel junction, is well shielded from the influence of the drain by the N+ source,” explains Hu.

However, he also notes it isn't necessary to use exotic super-low-bandgap semiconductors to scale supply voltage down to 0.2 V. Rather, he believes it's possible to combine two large-gap semiconductors, such as silicon and germanium, to get low supply-voltage operation beyond the reach of either of these materials by themselves, a process Hu calls hetero-tunneling gFET. Using hetero-tunneling structures, Hu believes, could lead to gFETs that operate at 0.2 V or lower, thereby reducing transistor and interconnect power consumption by a factor of 20.

“Green transistors are designed to have electrical behaviors and geometry quite similar to those of conventional CMOS transistors, except for the lower operating voltage and much lower power consumption. Therefore, circuit design techniques and know-how can be reused. These are desirable characteristics of any new transistor, but not provided by many of them,” explains Hu.

Several additional universities beyond UC Berkeley have also started researching this new transistor. “We've demonstrated that the gFET can indeed break the performance-power trade-off that has been considered fundamental for CMOS transistors, the workhorses of the IC landscape. Showing that the 40-year-old fundamental limit is breakable is a big step forward and gives hope that large energy efficiency gains are indeed possible,” says Hu. He also notes that the semiconductor industry research consortium, Global Research Collaboration, has initiated research on this topic, though individual companies in the IC industry usually wait for definitive proof of efficacy before initiating significant technology research efforts.

Of course, all this work will be for nought if semiconductor manufacturers can't make gFETs without expensive investments in new equipment. On this point Hu says, “I designed the gFET to reuse two existing infrastructures in the IC industry, the chip manufacturing and the circuit-design infrastructures. Both are too large and too expensive to replace. Green transistors can be manufactured with the same equipment as conventional advanced ICs. The equipment will only need modest updating, similar to the normal upgrading that happens every few years.”

More info

Dr. Hu's Web page,

GRC — Global Research Collaboration,

ITRS — International Technology Roadmap for Semiconductors,

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