Power Electronics
DC-DC Regulator Includes Digital Dynamic-Loop-Compensation

DC-DC Regulator Includes Digital Dynamic-Loop-Compensation

Ericsson has introduced a 3E* DC-DC regulator, the BMR461, that is the first 12 x 12 x 8 mm 12A digital point-of-load (POL) module to combine Dynamic Loop Compensation (DLC), low-bias current technology, advanced energy-optimization algorithms to reduce energy consumption, and a land-grid-array (LGA) footprint that guarantees excellent thermal, mechanical and electrical performance.

The new BMR461 Dynamic Loop Compensation is based on 'state-space' or 'model-predictive' control, which guarantees stability while also achieving the optimum dynamic performance without requiring any external components. The new product performs an automatic compensation routine that is based on measured parameters, which enables the construction of an internal mathematical model of the power supply including external components such as filtering and parasitic resistors.

Based on the 'state-space' mathematical model rather than traditional proportional-integral-derivative (PID) regulation, the BMR461 uses closed-loop pole placement and a model based on the resonant frequency of the output filter, thereby reducing the number of output capacitors required for filtering and stability. This technology is highly suitable for FPGA and processor applications where low-ESR decoupling capacitors are currently being used.

The BMR461 DLC is designed to accommodate the vast majority of applications via PMBus commands. Board-power designers can therefore tailor the loop compensation; for example in low output voltages to enhance the recovery time at load release by enabling a negative duty-cycle using the LOOP_CONFIG PMBus command. Many other parameters can be simply adjusted and monitored without any hardware modifications.

The BMR461 features several algorithms that optimize efficiency across a wide range of operating conditions. Compared to the conventional technology that is currently implemented in analog and digital-hybrid POL regulators, the device's combination of energy optimization algorithms and low bias technology requires up to five times lower current, and therefore further improving overall efficiency.

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