Power Electronics

Power Supply R&D: Reactive or Proactive?

The question of whether to do research and development (R&D) is a perplexing problem for most power supply companies. My experience at an aerospace company points out the problem. When business was good and everyone was busy, no one was available to perform R&D. In contrast, when business was not good there was no budget available for R&D. Therefore, about the only time engineers worked on R&D was in between the two extremes from good to bad times.

A similar situation is occurring now that the electronics industry is going through one of its down cycles. If power supply companies don't do R&D now, will it make any difference in the future? My guess is that few power supply companies have the funds for an aggressive R&D program at this point in time. In addition, because of the projected complexities, system engineering must be factored into the R&D equation. And, who will do the system engineering, the power supply company, IC manufacturer, system manufacturer, or all of them?

The key to power supply company R&D is the semiconductor industry and the products they project for the future. Despite the present economic situation, the IC industry continues to move ahead with its R&D plans. This was evidenced in a recent meeting of the Semiconductor Industry Association that projected their future goals in the latest version of the International Technology Roadmap for Semiconductors (ITRS).

The ITRS projects operation at 1V in 2004, 0.6V in 2010, and 0.4V in 2016. Future projections push the “SOC” (system on a chip) concept, which would include CPU cores, embedded cores, and memory. They would require high I/O bandwidth, computational power, GOPS/mW (giga-operations per second/milliwatt), and relatively small die size. SOC devices will require very low standby power and then much higher peak operating power and current. Added to this is the ability to operate at GHz frequencies.

Projected power for future microprocessors will require the same operating voltages as the SOCs, but power dissipation will be in hundreds of watts and operating frequencies will be several GHz. Supplying the power, current, and dynamic response for these devices will pose problems for power supply designers. The combination of low operating voltage, high operating current and high operating frequencies, low standby power, and then a large power increase requires power supply technology that doesn't exist at this time.

If you were the CEO of a power supply company, would you invest in R&D to meet the challenges of 2010 or 2016? Then again, would you expect the IC industry to meet its projections for power and voltage by 2016? In light of the present economic conditions would it be better to be proactive or reactive? Following are some of the ITRS findings that could aid in your decision making.

According to the report's “2001 Big Picture”:

  • Cost of design threatens continuation of the ITRS.
  • We have better information flow between semiconductors and applications, software, and architectures.
  • We are strengthening the bridges between ITRS technologies.

Another aspect of the recent report is power as a cross-cutting challenge:

  • Reliability and performance analysis impacts power.
  • The accelerated lifetime testing (burn-in) paradigm fails.
  • Low power management gaps (standby power for low-power SOC; dynamic power for microprocessor unit, MPU).
  • Power optimizations must simultaneously and fully exploit many degrees of freedom while guiding architecture, operating system (OS), and software.

Interference is another of the cross-cutting challenges:

  • Lower noise headroom, especially in low-power devices.
  • Coupled interconnects.
  • Supply voltage IR drop and ground bounce.
  • Thermal impact on device off-currents and interconnect resistivities.
  • Mutual inductance.
  • Substrate coupling.
  • Single-event (alpha particle) upset.
  • Increased use of dynamic logic families.
  • Modeling, analysis, and estimation at all levels of design.

Future mixed-signal devices will also have their challenges:

Today, the digital part of circuits is critical for performance and is dominating chip area. However, in many new IC products the mixed-signal part becomes important for performance and cost. This shift requires definition of the “analog boundary conditions” in the design of the ITRS. The goal is to define the criteria and needs for future analog/RF circuit performance.

My feeling is the power supply industry will have to take a reactive approach toward R&D in 2002 related to future ICs. Send your comments to [email protected].

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