The emphasis on new electronic systems is to make them smaller — which is causing power semiconductor manufacturers to discover ways to accomplish this. Smaller may be better in terms of meeting the demands for shrinking systems, but thermal performance is an issue you can't ignore. An obvious first approach is to cut device on-resistance and reduce device power dissipation. Several power MOSFET companies now employ power trench technology, which improves thermal performance compared with their older generation predecessors.
New packages are another way to improve a MOSFET's thermal characteristics. One approach employed by semiconductor manu-facturers is to house a power MOSFET in a package with an exposed drain pad, which improves thermal characteristics, high current handling capability and low on-resistance and removes heat from the junction efficiently. Thermal paths are kept to a minimum by two means. First, a leadless package reduces thermal resistance compared with a leaded package. Second, the thermal pad underneath the package permits an optimal package-cooling interface to the p. c. board.
The key parameter that relates to the power semiconductor's ability to handle it self-generated heat is its junction temperature. Package design, die size, and lead frame materials determine the junction-to-case thermal resistance. The junction-to-ambient thermal resistance depends on the size and mass of the board's copper under the device.