Following last year's rolling blackouts in California and the presidential attention that power deregulation has provoked, energy efficiency has gained a higher profile in the United States. Today, energy trends drive off-line power topologies that consume very little incremental power from the mains during normal, standby, and no-load operation. It's fair to say that semiconductor manufacturers with ac-dc products in their portfolio will be striving for energy efficiency in anticipation of impending voluntary and regulatory standards. Let's look at some industry trends, which will possibly dictate future requirements.
One possible trend for future battery-powered systems involves including the power supply semiconductors in a system on a chip (SOC). This isn't feasible at higher power levels, because heat dissipation on a chip isn't uniform. Furthermore, a disproportionate area of the device would be subject to wafer processing steps that would not create value in the power device — an instance of poor “silicon efficiency.” However, in low power battery applications, the lateral DMOS device in a BCD process or the MOS switch in a BiCMOS process gives acceptable performance.
In wireless platforms, such as cell phone handsets, manufacturers have produced chipsets that perform all the functions previously performed by discrete and simple analog blocks. They are also integrating the power management functions into one IC, called a power management unit (PMU) that contains all the required circuits.
Cell phones are complex in terms of power management. A portion of a cell phone's power management is for the RF power amplifier (RFPA). Most RFPAs are linear. The RFPA controller senses the incoming RF signal and produces an envelope of voltage for the RFPA. To conserve power, a tracking circuit minimizes headroom for the RFPA.
Currently, a PDA performs more functions than the cell phone, which reserves processing power for error correction. The error correction overhead in handsets becomes more significant as data processing power and bandwidth increases. The power management scheme must embrace this added sophistication in an environment where real estate, operating life, and efficiency are prime considerations.
Effective power management is also an essential element in the multiphase regulator configurations powering today's microprocessors. The next step is to co-package the drivers and power MOSFETs for each phase, minimizing HF parasitics, component count, and increasing the converter's thermal efficiency. To do this, companies use multichip modules (MCMs), where the design challenge is manufacturability and cost. Inevitably to succeed, the MCM should cost no more than the sum of the parts that went into the discrete circuit.
Currently, two to four phases suffice, depending on the processor and platform; however, new processors will eventually require lower power supply output impedance. By 2005 the load line for a high-end processor might be as low as 1mΩ. At that impedance, a key challenge will be filter capacitor ESR/ESL and interconnect resistance.
Power Supply Industry
The power supply industry continues to evolve with little standardization. The load may be standard in one platform, but not standard from platform to platform or industry to industry. Digital systems may use a modular approach, but an optimal solution gives the designer a custom solution with standard elements. This allows reuse of existing designs and well-characterized tried-and-tested circuitry. In the IC area, design reuse shortens time to market.
Another future trend involves marketing semiconductor components as an entire system, as opposed to an individual-part solution. As the power management marketplace grows, communication between designers within the same company will become even more necessary to achieve a smart system-level solution. In the meantime, hard-pushed power supply designers have every right to refer pure component vendors to the purchasing department.
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