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Power Electronics

Package Development Goes with the (Air) Flow

With the pace of improvements in silicon slowing, power MOSFET manufacturers continue to focus their attention on device packaging. Engineers attending this month's industry events — the Electronica show in Germany and the Power Electronics Technology conference in Chicago — will discover further evidence of this trend as vendors unveil new transistors in advanced surface-mount packages.

In recent years, semiconductor vendors have been busy redesigning packages such as the SO-8 to reduce parasitics and lower thermal resistance, enabling low-voltage power MOSFETs to handle higher levels of current with greater efficiency. One characteristic being exploited in new package designs is double-sided (topside) cooling.

Rather than simply dumping all of their devices' heat into the pc board, packages with double-sided cooling allow heat to escape from the top of the package. By itself, this feature increases the power that can be dissipated in a given footprint, but that advantage can be amplified by the use of forced air cooling and heatsinks.

Some of the initial uses for MOSFETs with double-sided cooling have been in VRMs and embedded dc-dc converters on motherboards. However, MOSFET vendors are exploring other opportunities for double-sided cooling as evidenced by some of this month's trade show activities.

For example, Vishay Siliconix will unveil its version of double-sided cooling, the PowerPAK. With its SO-8 footprint, this encapsulated lead-frame-based package bears close resemblance to a standard SO-8. However, a cutout in the encapsulation on top of the PolarPAK exposes a metal die-attach pad that may be connected externally to a heatsink (see page 56 for related article).

Trade show attendees also will get a look at additions to International Rectifier's DirectFET family of devices. The company will introduce 40-V and 100-V MOSFETs in the DirectFET package, extending its application in networking, telecom and high-end computing applications. In addition, in a paper being presented at the Power Electronics Technology conference, Fairchild Semiconductor will discuss findings related to its BGA power package, which is also the subject of an article in this issue (see page 48).

These product developments and discussions only scratch the surface of vendors' efforts to deliver double-sided cooling. Another company, Philips Semiconductor, is considering creating a new version of its LFPAK (co-developed with Hitachi, now Renesas Technology) to enhance its suitability for topside cooling. According to the company, the LFPAK in its current form may be topside cooled through the thin layer of plastic encapsulation that covers the source contact.

But Philips Semiconductor is now performing thermal modeling on an “inverted” LFPAK in which an exposed drain contact would appear on the top of the device. This package could be useful for applications where designers want to limit heat dissipated in the PCB. An inverted LFPak could be introduced as early as next year. Infineon intends to introduce a MOSFET package with double-sided cooling next year. Meanwhile, other vendors may be entering the fray as new-package licensees. With the introduction of PolarPAK, Vishay Siliconix is announcing a second-source agreement, and earlier in the year, Fairchild Semiconductor licensed its BGA technology to GEM services.

During the next few years, there will be much jockeying among MOSFET vendors as each seeks to establish its package as the successor to the SO-8. Customers will need to sort out the various vendor claims and determine which packages work best in their applications.

But beyond the choice of packaging, there's a great opportunity for designers to apply creative thermal management techniques in their power-supply designs. Simply slapping a low-cost extrusion on top of a row of MOSFETs may not always be the best approach to cooling in spite of cost pressures to do so. Perhaps now is the time for semiconductors vendors, customers and thermal management specialists to find creative ways to optimize MOSFET performance by applying the latest innovations in thermal interface materials, heatsinks and fans. This level of collaboration may be necessary to ward off future design bottlenecks as power demands continue to rise.

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