Power Electronics
Lossy SPICE Models Produce Realistic Averaged Simulations

Lossy SPICE Models Produce Realistic Averaged Simulations

Standard averaged converter models do not include the losses. Instead, they usually insert ideal elements, and calculations omit some voltage drops. This simplifies the analysis, yet alters the dc operating point and ac response.

Figs. 1a and 1b depict a buck converter that includes losses attributed to: a) inductor wire resistance, Rlf, b) power switch RDS(ON), RON, and c) the diode forward drop, Vf, and its dynamic resistance

When the switch closes, the inductor voltage VL and capacitor current IC are defined via the following equations:

VLON = (VIN - VOUT) - I × (RON + Rlf)

At the switch opening, the current (I) keeps circulating in the same direction, but now flows through the free-wheel diode to keep the ampere-turns constant in the inductor. The equations become:

VLOFF = -I × (Rd - Rlf) - VOUT - Vf

Theory dictates that the average voltage across the inductor must be null when the converter reaches equilibrium: = D × VLON + D' × VLOFF = 0


D = Duty cycle

and depicts the OFF time over the period T

Which by combining Equation (1) and (3) gives:

[(VIN - VOUT) - I × (RON + Rlf)] × D + [-I×Rlf + Rd) - Vf - VOUT] × D' = 0

The above statement regarding the inductor average voltage also translates to a capacitor where its average current shall be null when the converter operates in steady-state: = D × IcON + D' × IcOFF = 0, which by combining Equations (1) and (3) gives:

By solving Equation (6) and plugging I into Equation (5), we obtain the complete transfer function of the buck affected by static losses:

Equation (7) shows losses are weighted accordingly to the time sequence in which they play: Rlf is present during TON and TOFF whereas RON and Rd are respectively active during TON (D multiplication) and TOFF only ([1-D] multiplication).

In previous averaged models, the state-space averaging technique or switch waveforms analysis were usually applied over perfect elements, non-inclusive of the above ohmic losses. However, if these elements play an active role in the dc transfer function, they affect the small-signal ac analysis by introducing various damping effects. In a recent paper presented in PCIM Nuremberg 2001, Sam Ben-Yaakov presented his modified generalized switched inductor model (GSIM), where all conduction losses were modeled[1]. Without entering into the details of the model derivation, Ben-Yaakov did not depart from his original model but added in series with the inductor the losses specific to a given time interval (for example, Vf and Rd during D' in a buck, etc.). An interesting feature consisted in including the true diode SPICE model and the real MOSFETRDS(ON)@Vgs, if necessary. Fig. 2, on page 58, shows how to implement this model in a boost voltage-mode application.

The internal RON was passed as a standard resistor parameter to keep the simplest implementation; however, the diode model was kept external. A dc sweep was performed on the schematic where VDON was swept up to 900mV (90% duty-cycle). Fig. 3 reveals the results showing the latch-up characteristic of the boost when the ohmic losses become more significant compared to the load. You can download the above model subcircuit netlist in IsSpice4 and PSpice from the author's Web site[2]. Other models include lossy buck in voltage and current-mode control. More complex models, including dynamic switching losses, were derived by the Colorado Power Electronics Center (CoPEC). An extensive documentation related to the subject is available at http://ece-www.colorado.edu/~pwrelect.


  1. Ben-Yaakov, Sam, and Zafrany, Isaac “The Generalized Switched Inductor Model (GSIM) Accouting For Conduction Losses,” PCIM Nuremberg 2001.

  2. http://perso.wanadoo.fr/cbasso/Spice.htm

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