Power Electronics

SiRF combines GPS engine with 32-bit ARM CPU for navigation and telematics

SiRF Technology Holdings Inc. has introduced the SiRFstarIIA, a GPS system-on-chip for automotive navigation and telematics that combines the company’s SiRFstarII GPS engine and SiRFstarIIe architecture with a 32-bit RISC CPU and most of the peripheral interface circuitry required for the applications. The SoC is intended to reduce time to market and lower bill-of-materials costs for automotive navigation/telematics developers.

Peripherals include UARTS, a CAN bus, USB, SPI, ATAPI/EIDE, 16-bit hi-fi audio D/A converters, 14-bit precision D/A converters, and 34 general-purpose I/O pins to support man-machine interface, audio, and other connection and control functions.

The chip has an average cold start time of 45 seconds and provides 1920 time/frequency search channels for signal acquisition. SiRF multipath mitigation, FoliageLock and SingleSat features are available to optimize tracking performance, according to the company. The 32-bit ARM720T processor offers better than 65 MIPS performance, and includes a memory management unit and four-channel direct memory access. It can address up to 128 MB of external SDRAM and 8 MB of SRAM/Flash.

The SiRFstarIIA works with SiRFDRive 1 and SiRFDRive2 GPS/Dead Reckoning software, which leverages a vehicle’s data bus as a source of distributed sensor information, thereby eliminating the need for an automotive gyro. For application development, SiRF offers tools for GPS and dead reckoning, and is partnering with QNX Software Systems (www.qnx.com), which will provide a system development kit and board support package based on its Neutrino real-time operating system. SiRF is also partnering with Horizon Navigation (www.horizonnav.com), which will contribute its NavMate software for sample turn-by-turn and map-based navigation applications.

A leading European Tier 1 navigation supplier, according to SiRF founder and vice president Kanwar Chadha, has adopted the new SoC.

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