What you’ll learn:
- The importance of properly integrating test points into a PCB design.
- Test-point deployment considerations.
When it comes to creating a modern electronic design, we live in both the best and the worst of times.
Electrical and electronics engineers have access to many high-end technologies, but integrating them all in a cost-effective way is no easy feat. Every design is a result of a juggling act by the engineering team to create the best product given the situation. One way to ease the challenge is to do design for manufacturing (DFM), a practice that helps make sure the design is as advanced as possible without being impossible to build.
A crucial but often overlooked aspect of DFM is to ensure that the product can be tested properly. The high levels of system integration and circuit density can make comprehensive testing, especially at the board level, a challenge. Therefore, it’s best to design the board with test capabilities in mind.
Ideally, a board should have a test point for every node in the circuit, and the 100% probing access makes it possible to evaluate every component on the printed circuit board (PCB). The deployment of the test points and pads involved can be a balancing act between performance and accessibility.
If the circuit doesn’t have enough access to test it properly, it will be harder to determine aspects beyond basic performance. Bad components or poor attachments on a board can make it difficult to determine if there’s not proper access to those parts to test them. A bad resistor, for example, can be easily found if one can probe it directly, but it may be hard to detect if its status can only be inferred.
The deployment of test points must also take the parasitics of the PCB in mind, especially in RF circuits where a poorly placed test point could create unwanted artifacts.
What to Consider When Deploying Test Points on a PCB
Many types of test points are used in board-level evaluation, and each one has pros and cons. Test hardware on the board should be a mix of pads for machine testing and some loops and pins in strategic places for hand prototype testing and in-field troubleshooting.
During the prototyping phase, and for in-field testing by hand, test pins and loops are valuable as they enable the engineer or technician to easily clip a probe to them. Test pads are most useful for automated test systems since they provide a place for a spring probe or pogo pin to land. Depending on the traces and vias that must be accessed, and the general construction of the PCB, a through-hole or a test pad for surface mounting may be more appropriate.
Another factor that must be considered in the placement of test points is the mechanical stress that the board may encounter. Each spring probe exerts a force to ensure secure contact with the test pad. Test points should ideally be equally spread around the board to disseminate the spring-probe forces.
Dispersing test points around the board also makes it possible to select a larger and more durable spring probe. A test probe that measures 100 mils (2.54 mm) is more sturdy and less likely to bend than a 25-mil (0.635 mm) version. However, it may not be feasible to use in any given situation due to the density of the components on the PCB and the proximity of test pads.
The mechanical issues in automated testing (see figure) with a bed of spring probes should not be taken lightly. Each spring pin lands on a given test pad with a certain amount of force, and that force must be considered.
For instance, if you have 100 probes with 10 grams of force each, you are placing 1 kg of pressure on the board under test. If that force isn’t carefully considered, especially if it’s exerted unevenly over the board, it could significantly damage the device, particularly one with several thin layers.
Another reality in test-point deployment is that it will not be possible to cover 100% of the board to be tested. The amount of coverage will vary due to the circuit design and the space available to place test pads on the board. The product designers and the test engineers will have to negotiate to figure out the most important components or circuits of the board to test. This is a major part of design for testability, and can impact manufacturing, product certification, and time-to-market.
One example of how test-point deployment is tied to manufacturing cost involves the number of layers in the PCB. The test engineer would prefer to have a lot of test pads on the PCB, but the product designer will have other ideas. There may have to be a compromise between saving a layer of the PCB and reducing the number of test pads.
A sizable difference in cost exists between a six- and four-layer board. The challenge is to deploy enough test pads on the board to do the job without adding too many costly layers.
Why Placing Test Points on the PCB Matters
What do you do with circuit boards that lack enough test pads? When that’s the case and the circuit board isn’t arranged effectively for testing, it’s often necessary to bring in intelligent algorithms and other test technologies to develop a more creative solution.
One of the test technologies that can leverage the number of test points available is IEEE Boundary Scan 1149.1. It’s also widely used as a debugging method to evaluate integrated-circuit pin states, measure voltage, or analyze sub-blocks inside the IC.
Technology advances are easing the pressure in some cases, as more systems can support themselves with programmable devices on the board. Such devices also need to be accessed, but they can often be accessed by the I/O data bus used by the circuit to control its peripherals.
That’s also an issue when for security requirements subsystems may need to be programmed on the board itself as part of final manufacturing. When you use a bus, you can use fewer test pads, but some circuits may be programmed through the test pads as well, increasing their utility.