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Traditional motorphasecurrent sensing methods depend on sensors with signal bandwidths of 100 kHz or greater. Problematically, such bandwidths allow highfrequency noise into the sense path. Topologies that reduce the noise to systemtolerable levels vary from a lowcost RC input filter to more complex and expensive filtering techniques such as analog or digital postprocessing. In many cases, the final design embodies a compromise between a large group delay and residual highfrequency harmonics. A novel approach integrates a multistage, adaptive filter in which the tuning and harmonic suppression are functions of the pulsewidth modulated (PWM) clock frequency.^{[1]}
A standard currentshunt sense resistor in series with the motor's highside phase lead maps the motor current onto a ±250mV fullscale range. An onchip differential amplifier measures the voltage across the sense resistor and provides the filter's input signal. The filter's first stage is a resettable integrator, which is synchronized with the PWM. The sync pin requires a PWM clock with a 50% dutycycle square wave.
The synchronization allows the adaptive filter to precisely place transmission zeros at the input signal's even harmonics. This arrangement results in both high noise attenuation and phaselag compensation. Moreover, an integrator operating over onehalf of the PWM period has a transfer function that is similar to a singlepole system with its corner frequency equal to the PWM frequency, beyond which highfrequency noise is attenuated by the expected 20 dB/decade. The second stage samples the first stage's output at twice the sync frequency. This action removes the odd harmonics from the input signal without adding further delays.
Implementations of this patented adaptivefilter design, which the IR2177, IR2277, IR21771 and IR22771 phasecurrent sensor ICs embody, include a third stage that provides a PWM output with a duty cycle proportional to the input shunt voltage. A fourth stage on the IR2177 and IR2277 reconstructs a ratiometric analog output that the chip updates twice per PWM cycle. Built on a highvoltage IC process, the devices can accommodate input commonmode voltages as great as 1200 V, operate on a nominal 15V supply and require only six external components, two of which are pullup resistors (see the figure).
One of the four remaining components, the sense resistor, maps the motor phase current onto a ±250mV input range. The other three components form a bootstrap supply that floats above the highvoltage commonmode potential. The resistor, 5 Ω nominal, limits the capacitor current at startup. The diode must have a breakdown voltage greater than the IC's highvoltage commonmode voltage — either 600 V or 1200 V depending on the IC model. The diode also needs to have a reverse recovery time less than 100 ns.
Lastly, a simple twoequation procedure determines the bootstrap capacitor's minimum value (C_{BOOTmin}) that takes into account a number of applicationspecific terms such as the PWM's maximum on time (highside on time, T_{HON}), the bootstrap diode's maximum leakage current (I_{LKdiode}) and the capacitor's selfleakage (I_{LKcap}), a term that is dependent upon capacitor construction.
To determine the C_{BOOTmin} value, first calculate the total capacitor charge (Q_{TOT}):
Q_{TOT}=Q_{LS}+(I_{QBS}+I_{LK}+I_{ LKdiode}+I_{LKcap})×T_{HON}
where Q_{LS} is the charge required by the IC's internal level shifters, typically 20 nC; and I_{QBS} is the floating section quiescent current; I_{LK} is the floating section leakage current. The minimum capacitance can then be calculated as:
where ΔV_{BS} is the maximum admitted voltage drop for V_{BS}, which is the voltage across the capacitor.
Housed in a 16lead, widebody SOIC, the IR22771/21771 phasecurrent sense circuit operates on a maximum quiescent current of 2.8 mA.
References

IR2277S/IR2177S data sheet, available online at www.irf.com/productinfo/datasheets/data/ir2177s.pdf.