Appliance manufacturers today are adopting variable-speed permanent-magnet (PM) synchronous motors to improve energy efficiency and to add product features. Industrial drive makers have long recognized the high efficiency and high power-to-weight ratio of the PM motor, but a recent advance in control electronics is enabling their widespread adoption by appliance makers.
Field-oriented control (FOC) using only dc-link current feedback provided from a single shunt resistor minimizes system costs, making it attractive for appliance drives. Sinusoidal control of the motor generates a smooth torque output that generates low acoustic noise. These results make FOC applicable to fans, pumps, washers and dryers where low noise and high efficiency are important.
Several appliances such as air-conditioning and washer-dryer units must independently control the speed of two motors to optimize their performance. The traditional approach for such systems is to use separate motor-control processors with a serial communications link for synchronization.
However, significant simplification of hardware and system design is possible if one device can control both motors. A recently introduced appliance-control platform simultaneously controls two PM ac motors using only dc-link current feedback. It is equipped with an IC that has an embedded FOC algorithm that minimizes development time and enables rapid adoption by appliance makers.
Sensorless Motor Control
FOC is common in industrial-drive systems, which typically measure the rotor position using encoders or resolvers. The closed-loop current-control algorithm uses the rotor's angular position to align the motor currents with the rotor flux, maximizing torque production. Advanced rotor-position estimation algorithms (Fig. 1) in appliance-control systems eliminate the need for high-resolution position sensors.
The estimation algorithm derives the PM's rotor-flux position based on a motor model using the winding voltage and current information. This approach is appropriate because the magnets on the rotor determine the position of the rotor flux. The winding current measurements derived from the dc-link current, which is captured through the appropriate analog-to-digital control (ADC) sample timing based on knowledge of the power inverter's state.
The Fig. 1 system block diagram shows that the winding current measurements and the winding drive output voltages are inputs to a rotor-flux model that calculates the rotor's angular position and velocity. The torque- and flux-control loops maximize torque production in the lower speed range, but also enable high-speed operation using field weakening.
A combination of analog and digital components provided these functions in first-generation FOC motor-drive systems. Today, the majority of these motor-drive systems use high-speed DSPs or RISC processors to implement the algorithm on a single IC. The transition to software implementations provided the advantages of flexibility and hardware simplicity, but also introduced a significant software-development task for the drive-system developer.
There are a number of steps in generating software code for the control algorithm. As a first step, a systems engineer translates the control schematic into a set of difference equations representing each control function. In the next step,a software engineer translates the difference equations into C code that defines the instructions running on the processor. This process is prone to errors, adding to the development time and, unless the code is well structured and documented, has long-term software maintenance ramifications.
The RISC processor and DSP suppliers support motor-drive companies by providing a full suite of sample FOC software to help speed the development process. This is possible because FOC control technology is quite mature, and so the algorithm structure is well defined. However, now there is no particular advantage in a software implementation, because flexibility in the algorithm structure is no longer necessary.
Control-system designers can implement the FOC algorithm in hardware using digital ASIC or FPGA technology. The development process is not very different from the software approach in the first step. Instead of using C code, a hardware engineer translates the difference equations into Verilog code that defines the logic-gate interconnections.
Such a design defines and stores system-control parameters in control registers for development flexibility, but hardwires the algorithm structure in the digital ASIC. This approach is common in telecommunication systems where high-processing speed is required. A number of motor-control ASICs implement FOC and other motion-control functions. The advantage in this approach is not only increased execution speed, but also significantly reduced system development time.
An alternative approach that a motion-control engine (MCE) provides combines the high-speed performance of dedicated ASIC hardware and the flexibility of a programmable processor. This is particularly effective because the FOC algorithm uses a number of standard functions such as error amplifiers, proportional-plus-integral (PI) compensators and vector rotators that appear multiple times in the control schematic. The MCE consists of a library of hardware motor-control functions that a motion-control sequencer effectively interconnects by assigning input- and output-memory addresses to the corresponding system variables.
The control-system engineer does not need to translate the control schematic into a set of difference equations because a fully optimized ASIC implementation is available in the MCE library. Instead, he uses a schematic-editing tool to define the control schematic graphically by interconnecting standard functions from the motion-control library. A graphical compiler translates the control schematic into MCE sequencer commands that interconnect the hardware control functions. The compiler assigns an address in the MCE's shared RAM area to each algorithm variable that the control nodes define. The MCE sequencer commands define each control-function block along with the memory addresses for the input and output variables. Because the MCE stores these commands in memory, it has the same flexibility as a RISC processor or DSP.
The PWM switching frequency sets the algorithm-execution timing, the ADC's sampling rate and the rate at which the output voltage is updated. MCE library components represent the space-vector modulator and the ADC inputs, but they appear only once in the control schematic because they correspond to physical input and output pins.
On the other hand, MCE library control functions such as the vector rotator or the PI compensator can appear multiple times in the control algorithm because the MCE stores their inputs and outputs in data memory. Each instantiation of a library function consumes data-memory space for variables and MCE instructions, so memory size limits the complexity of the algorithm. Each library function consumes a certain number of system clock cycles every time it executes, so the total number of clock cycles that the control loop consumes must be less than the number of clock cycles in the PWM cycle.
The rotor-angle estimator and current-control loops consume about 1400 cycles of the system clock, corresponding to 11 µs at the maximum system clock of 128 MHz. Thus, it is feasible to control two motors at the same time with a PWM period of 50 µs, corresponding to a 20-kHz switching frequency.
Of course, to control two motors the IC needs two sets of space-vector PWM modulators and an extra analog input for current sampling of the additional dc link. Fig. 2 shows a dual motor-control IC with the embedded MCE and an 8-bit MCU core for application-layer code. The advantage of this approach is that it decouples the execution of the slow system-level functions on the microcontroller from the high-speed motor-control algorithms that the MCE executes.
MCE Library Functions
The key to the high execution speed of the control algorithm is the efficiency of the ASIC's implementations of the MCE library functions. Two important feedback control elements — the PI control compensator and the vector-rotation block — exemplify the library functions. The ASIC implementations need to optimize silicon real estate as well as clock-cycle usage without sacrificing robustness and reliability.
The ASIC implementation of the well-known PI control compensator (Fig. 3) is based on a continuous time-domain transfer function:
Transformation of this expression to the discrete time domain yields a set of difference equations that define the ASIC implementation:
The summation unit for the integral term has 32-bit resolution to maintain accuracy for low input levels but rescales the output to a 16-bit variable. The anti-windup blocks prevent saturation of the integration term once the output reaches the system's physical limits.
The vector-rotation block is a 2-D matrix function that transforms voltages between the rotating and stationary reference frames. The forward rotation has sine and cosine terms:
Various trigonometric identities can reduce the calculation of the sine and cosine terms to a single sine-function calculation over the range 0 degrees to 90 degrees. However, the calculation of this term will vary depending on the available hardware. In some microcontroller implementations, the lack of a fast multiplication function forces the software developer to rely on simple lookup tables. In the case of DSP or RISC processors with a single-cycle multiply instruction, a Taylor expansion calculates the sine function.
A vector-rotation function, known as the CORDIC algorithm, has been developed specifically for an ASIC implementation that relies on a series of add, subtract and shift functions that yield 12-bit accuracy in 13 cycles (Fig. 4). This calculation is 10 times faster than the calculation using the Taylor expansion on a 32-bit RISC processor.
Simplifying Motor Control
While many configurations are possible, Fig. 5 illustrates the savings that are possible when a single-control IC operates a dual-motor platform. In addition to eliminating the unnecessary overcapacity resulting from the use of a second IC dedicated to the control of a second motor, extremely complicated interfacing between the two motors is possible. For example, in the event of a fault in one motor, such as a short or lockup, the second motor could almost instantaneously be de-energized in a reflex-like action that would preclude the delays associated with the communications interface to the host control system.
In addition to eliminating the unnecessary complexity of using a second IC dedicated to the control of a second motor, extremely complicated interfacing between the two motors is possible. In an air-conditioner application, for example, the speed of the compressor motor and the evaporator fan need to track each other to optimize the operating efficiency. The control system sets the motor speeds by writing to MCE registers directly and avoids complex communications between multiple ICs.
Murray, Aengus, “Sensorless Motor Control Simplifies Washer Drives,” Power Electronics Technology, June 2006, pp. 14-16, 18, 20-21.
Takahashi, Toshio, “Motion Control Engine for Advanced Motion Control Application — A New Architecture Microcontroller Proposal.”
Andraka, R., “A Survey of CORDIC Algorithms for FPGA Based Computers,” proceedings of ACM/SIGDA 6th International Symposium on FPGAs, 1998, Monterey, Calif.