Power Electronics

# Topology Selection by the Numbers Part Three

In the ﬁ nal part of this article series, the component stress factor method is applied to isolated topologies. These examples and those from parts one and two allow the merits and limitations of the CSF method to be evaluated.

In parts one and two of this article series, the component stress factor (CSF) method was defined and some examples of how to use it were given, concentrating on nonisolated topologies. In this third and final part of the series, we focus on isolated converters in both narrow and wide line-range applications, beginning with the basic flyback circuit shown in Fig. 1.

Table 1 lists CSFs for the flyback converter for a variety of operating conditions. In each case, the load is 100 V and 100 W. In the first case, where the line voltage is 100 V, the total semiconductor component stress factor (SCSF) of the flyback is much worse than the buck converter operating under the same conditions of line and load. In the second case, where the line voltage is 400 V, buck and flyback topologies have the same total SCSF. One point to draw from this analysis is that the ratio of line voltage to load voltage has no effect on CSFs for isolated converters, provided that the turns ratio of the transformer is optimally chosen. For the flyback converter, the optimal turns ratio is:

where N2/N1 is the optimal secondary-to-primary turns ratio of the flyback transformer, VOUT is the load voltage, VLINE MAX is the maximum line voltage and VLINE MIN is the minimum line voltage. Table 1 also shows that operating with a turns ratio that is suboptimal has a relatively small effect on component stresses.

The optimal turns ratio for a fixed line voltage is the turns ratio that corresponds to a duty cycle of 50%. Where the line voltage varies, the optimal turns ratio corresponds to a duty cycle range centered on 50%. Results for the flyback converter are also listed in Tables 2 and 3.

For total SCSFs in the wide line-voltage range application, which are listed in Table 3, the flyback has the lowest total SCSF at maximum line voltage, but there are several topologies that are better at minimum line voltage. Also, the flyback converter has relatively high values for total winding component stress factor (WCSF) and total capacitor component stress factor (CCSF).

From the last two columns in Table 1, we observe that CSFs increase dramatically with line-voltage range. In part one, we found that nonisolated converters have the same problem. For the case of wide line-voltage range under worst-case conditions, boosts had better total SCSF but worse WCSF than bucks.

Full Flyback Transformer Spotlight
Table 1. CSF values for the flyback converter with a 100-V load.
Flyback converter (Fig. 1) Turns ratio = 1
Max line = 100 V
Min line = 100 V
Turns ratio = 0.25
Max line = 400 V
Min line = 400 V
Turns ratio = 0.3333
Max line = 400 V
Min line = 400 V
Turns ratio = 0.2
Max line = 400 V
Min line = 400 V
Turns ratio = 0.5
Max line = 400 V
Min Line = 100 V
Turns ratio = 0.5
Max line = 400 V
Min line = 100 V
MMAIN Weight 1 1 1 1 1 1.414
MREC Weight 1 1 1 1 1 1
Total SCSF 32 32 33.35 32.8 162 157.4
L1 Weight 1 1 1 1 1 1.414
L2 Weight 1 1 1 1 1 1
Total WCSF 8 8 8 8 32 31.1
CIN Weight 1 1 1 1 1 2
COUT Weight 1 1 1 1 1 1
Total CCSF 4 4 4.17 4.1 20 18
Table 3. Total CSFs where the line voltage spans the range from 100 V to 400 V and the load is 100 V and 100 W.
Topology CSF Basic flyback
(Fig. 1)
Full-bridge converter with full-bridge secondary
(Fig. 2)
Single-ended forward converter
(Fig. 3)
Coupled-inductor buck
(Fig. 4)
Coupled-inductor boost with full-bridge secondary Boost preregulator plus dc transformer
(Fig. 6)
Total SCSF; VLINE = 400 V 44.1 224 68.75 139.8 45.4 68.3
Total SCSF; VLINE = 100 V 157.4 512 87.5 485.2 81.7 123.7
Total worst-case SCSF 157.4 512 125 485.2 100.7 123.7
Total WCSF; VLINE = 400 V 8.7 7 12.9 7.2 8.5 8.5
Total WCSF; VLINE = 100 V 31.1 12.25 26.8 23.1 15.6 16
Total worst-case WCSF 31.1 12.25 26.8 23.1 16.3 16
Total CCSF; VLINE = 400 V 4.5 3 4 11.6 12.4 0
Total CCSF; VLINE = 100 V 18 0 4 32.6 10.5 3
Total worst-case CCSF 18 3 4 32.6 12.4 3
Table 2. Total CSFs where line voltage is fixed at 400 V and the load is 100 V and 100 W.
Topology CSF Basic flyback
(Fig. 1)
Full-bridge converter with full-bridge secondary
(Fig. 2)
Single-ended forward converter
(Fig. 3)
Coupled-inductor buck
(Fig. 4)
Coupled-inductor boost with full-bridge secondary Boost preregulator plus dc transformer
(Fig. 6)
Total SCSF 32 32 32 32 32 44.3
Total WCSF 8 4 14.7 5.82 6 4
Total CCSF 4 0 1 9 2 0

However, we also found that over the line-voltage range, the CSFs for the buck were almost invariant and all the CSFs for the boost improved dramatically as the line voltage increased from the minimum line voltage. Furthermore, for the maximum line voltage, all of the boost CSFs were relatively small compared to those of the buck converter.

For most power converters and component types, the worst-case conditions for CSF occur at minimum line voltage, but the improvements that occur with increasing line voltage for most isolated converters are not as dramatic as the improvements that occur for the boost. A spreadsheet that illustrates these findings in more detail is available at www.technicalwitts.com.

The Fig. 2 circuit is a full-bridge forward converter with full-bridge secondary. This converter is a popular choice for high-power applications. For applications with limited line-voltage range, where the minimum duty cycle is 33% or higher, the full-bridge forward converter is ideal. For limited line-voltage range, the full-bridge forward converter offers good total SCSF and the lowest total WCSF and total CCSF. These results are indicated in Tables 2 and 3.

Notice how the SCSFs increase dramatically with the increase in line-voltage range. The increases have a dependency on the square of the ratio of maximum line voltage to minimum line voltage. When the full-bridge forward converter must operate over a wide line-voltage range, its total SCSF becomes large, but its superiority in total WCSF and total CCSF remains in wide line-range applications.

Numerical CSF results for Fig. 2 and the remaining figures appear in Tables 2 and 3. Table 2 illustrates the results for a fixed line voltage of 400 V and a load of 100 V and 100 W. Table 3 illustrates the results for a wide line range that extends from 100 V to 400 V and a load of 100 V and 100 W.

The CSFs for the single-ended forward converter of Fig. 3 depend on the transformer-reset mechanism used. The calculations for CSF assume an active reset mechanism, although the active reset circuit is not shown in Fig. 3. Also, the CSFs associated with the components of the active reset network are not included. We assume zero leakage inductance and an ideal transformer, in which case the CSFs of the components of the active reset network are zero.

For applications with limited line-voltage range, the single-ended forward converter has relatively good total CCSF but poor total WCSF. For wide line-range applications, it offers relatively good total SCSF and total CCSF, and the highest total WCSF.

The coupled-inductor buck converter of Fig. 4 has found some commercial acceptance as a post-regulator following a boost power-factor correction regulator in low-cost, low-power and mid-power applications in its ZVS form. A relatively simple ZVS mechanism[1] exists for the Fig. 4 circuit, adding to its appeal. For limited line-voltage applications, it offers a relatively low total WCSF, but a relatively high total CCSF. However, it is not a viable alternative for wide line-range applications.

Fig. 5 illustrates a coupled-inductor boost converter with a full-bridge rectifier.[2] The circuit can also be formed with a simpler half-bridge rectifier, but the total CCSF is higher for the half-bridge rectifier embodiment. Nearly on par with the flyback converter at maximum line voltage, this circuit offers the best total SCSF at minimum line voltage. It also offers relatively good total WCSF, but has a relatively high total CCSF. This topology is compelling for low- and mid-power applications for mid- and high-voltage loads. As a multiphase converter with a half-bridge rectifier, it is a viable higher efficiency alternative at any power level. There is also a simple ZVS version of this circuit described in reference 2.

Fig. 6 combines a boost converter with a dc transformer connected in series. In the dc transformer D1 = D2 = 0.5. This solution has higher total SCSFs than the single-stage topologies for limited line-voltage range, but for wide line range, it offers relatively low CSFs for all component types. Compared to the full-bridge forward converter for the wide line-range problem, it offers much better total SCSF and its total WCSF is only slightly worse. The combination of a boost preregulator plus a dc transformer should be considered as a viable higher-efficiency alternative to the full-bridge forward converter for high-power applications with wide line-voltage ranges.

For maximum-to-minimum line-voltage ratios greater than about 1.5, the boost-plus-dc-transformer solution offers lower total SCSF. For ratios less than about 1.5, however, the full-bridge forward converter offers lower total SCSF. To calculate CSFs for the series combination, we give the boost subconverter a subconverter weight for each component type. Then we give the dc transformer a different subconverter weight for each component type. And finally, we form weighting factors for each subconverter for each component type.

For the Fig. 6 circuit for the wide line-range application, we give the boost subconverter a semiconductor subconverter weight of 1 and the dc transformer a semiconductor subconverter weight of 1.04. From part one of this article series we find that:

For the boost subconverter, the semiconductor subconverter weighting factor,

is (1+1.04) / 1 = 2.04. And for the dc transformer, the semiconductor subconverter weighting factor is (1+1.04) / 1.04 = 1.96. For the boost subconverter, the total worst-case SCSF, Total SCSFI WORST, is 29.9, and for the dc transformer, the total worst-case SCSF is 32. For the entire combination, the total worst-case SCSF is: (2.04) (29.9) + (1.96) (32) = 123.7. The method for determining total CSFs for circuit topologies that comprise subconverter combinations is defined in part one of this article series and described and illustrated in part two.

We now have a new relatively simple method to numerically compare circuit topologies, which correlates well with component power losses and guarantees a valid comparison by requiring equal resources for each candidate topology. The CSF method offers insight into how resources might best be allocated for an optimal design.

It has been suggested that more valid results can be achieved by doing a complete design for each candidate topology and comparing the results of the complete designs. This is a good suggestion, and the CSF method provides an easier tool for narrowing the field of candidates, thereby improving the efficiency of the selection process. The CSF method does not eliminate the need for doing a complete design, since the CSF method does not consider many aspects of a design that are crucial. Rather, it seeks to be a well-reasoned numerical method for topology comparison.

The CSF method provides three numbers rather than a single number for comparing topologies. This has its advantages and disadvantages, because the CSF method provides insight into stresses for specific components but does not offer a definitive answer in many cases to the question of which topology is the best for a given application. Reasoning and experience will suggest how to choose the best topology where the set of three numbers does not offer a conclusive answer.

There will often be other considerations in the design to help determine the best topology. If the application is a low-power, low-cost, high-density application, for example, then the designer will likely want to switch at a high frequency where the size of magnetics and capacitors will be smaller due to the higher operating frequency. In that case, the designer will likely weigh total SCSF more heavily than total WCSF and total CCSF, since the size of the semiconductors required will limit the switching frequency, which can be higher when the total SCSF is lower.

Also, the parts count of the topology will be critically important for a low-cost design. For a high-power design, a relatively low switching frequency may be required, so the size of magnetics and capacitors will be more critical, in which case a higher total SCSF but lower total WCSF and total CCSF may be a more sensible approach.

There may be other requirements, such as a load-transient requirement, a hold-up requirement, an EMI requirement or interface-stability requirement, that dictate large capacitors. In that case, a high CCSF for efficiency is relatively inconsequential, since amply large capacitors are needed to meet the other requirements. Also, if a high CCSF is the only drawback to a topology and the application is a mid-power or high-power application, then the high total CCSF problem can be eliminated by employing parallel multiphase subconverters. There also are thermal and other performance advantages to parallel multiphase power conversion, because each subconverter of a parallel multiphase design operates at a fraction of the total system power. A higher switching frequency then becomes possible, lowering the size of both the magnetics and capacitors required. Therefore, multiphasing can indirectly reduce the total WCSF if the switching frequency is raised.

The CSF method indicates that component stresses increase dramatically for wide voltage-range applications. Methods that can limit the line-voltage range, such as a line-range switch or an auto-ranging circuit that changes a full-bridge rectifier into a voltage doubler at low line voltages, can dramatically reduce component stresses and improve efficiency.

There are certain assumptions made in the CSF analysis that may not hold up in some circumstances. For example, it was assumed that the resistances of components have a V2 dependency. However, lead resistance, which has no V2 dependency, forms a significant portion of a component's resistance at lower voltages. The reader must take this into account when applying the CSF method at low voltages. Another issue with very low voltages is that the calculated voltage stress for a given component may be lower than the voltage ratings for any commercially available device.

### References

1. Wittenbreder, E.H., “Zero Voltage Switching Pulse Width Modulated Power Converters,” U.S. Patent 5,402,329.

2. Wittenbreder, E.H., “Zero Voltage Switching Coupled Inductor Boost Power Converters,” U.S. Patent Application 60/766,547. Available online at www.technicalwitts.com.