Power Electronics
New Technique for Non-Invasive Testing of Regulator Stability

New Technique for Non-Invasive Testing of Regulator Stability

Output impedance is the key to testing filter and regulator phase margin, even when the control loop is inaccessible.

Many voltage regulators are of the fixed output variety and include the voltage divider internal to the regulator. There are definite advantages to this approach, which allows active voltage trimming and also minimizes the physical space required. A disadvantage to this approach is that the voltage divider is not available for Gain-Phase or “Bode” measurement. This leads many to believe that it is not possible, or even necessary, to evaluate the stability of such a regulator. Neither of these beliefs are true.

Digital systems often contain high-powered fast switching loads. Interconnects and load step repetition rates and times impact the power system’s stability. The loading can be difficult, if not impossible to replicate during the hardware development process and in simulation. Additionally, the stability varies throughout the system with varying impedances and filtering elements contributing to complex impedances presented to the power supply’s outputs.

While load step testing can be used to roughly indicate stability it does not provide an accurate phase margin number, and is subject to equipment interactions with the circuit’s impedance, depending on where the load step is injected. Electronic loads add unwanted load capacitance and generally do not have ramp rates that are capable of showing the true response of the system.

EMI filter stability is a critical power system characteristic to verify, especially so because DC-DC converters are often purchased separately and mated with a user-defined filter.

It would be useful to be able to measure the Middlebrook filter stability, as well as, the stability of switching and linear regulators “in system”, with the actual loading applied, though without the need to physically cut into traces to get to the control loops.

Here, we demonstrate how to determine the phase margin of a voltage regulator’s control loop, without breaking any connections (non-invasively), and using only an inexpensive Vector Network Analyzer (VNA) and fast voltage controlled current source (similar to a “G” element in SPICE), hereafter referred to as a “Current Injector”. In order to validate the method, an LM317 regulator is used so that the Bode measurement can be obtained for comparison with the proposed, non-invasive method. This measurement technique is also performed on a fixed output voltage regulator. Several output capacitors are used in order to obtain a wide range of phase margin solutions. This measurement process is applicable to linear, as well as switching regulators.

From the article discussed in (1), we determined the relationship between phase margin and Q in degrees as:

This implies that if we can measure the output impedance and determine the Q factor, we can determine the phase margin of the control loop.

Fig. 1 shows a generic test setup for the output impedance measurement. It should be noted that this method works using a simple clip lead on the output of the power supply. The measurement point can also be positioned anywhere along the voltage path, allowing assessment of the stability as the load impedance changes with layout.

The Current Injector converts an input voltage to an output current that is injected in parallel with the normal regulator’s load current. In this case, the Current Injector’s output current is modulated by the network analyzer’s oscillator. The Current Injector has an additional “monitor” output which is routed to the input of the Network Analyzer. The regulator’s output voltage goes to the other analyzer input; thus deriving V/I or output impedance.

The best overall fit to the Erickson/Maksimovic solution (2) is found as:

PM(Deg)=50.36 × Q-0.907 (2)

The result is within the greater of 3 degrees or 5%, which is useful in that the greatest accuracy is where it matters the most, which is at low phase margin. The equation breaks down at Q = 0.5 (>72 degrees), since there are no longer imaginary roots, therefore, at Q = 0.6 or 71.183 degrees, the VNA software screen reports the phase margin as > 71 Deg.

In order to demonstrate and validate the method, the first measurement uses an LM317 voltage regulator. This regulator is an adjustable type, allowing us to measure the control loop’s Bode response (Fig. 2) and also derive it from the output impedance (Fig. 3).

The output impedance corresponding to the same operating conditions in Fig. 2 is shown in Fig. 3. Note that some network analyzers can directly measure group delay, which is quite helpful, since the Q is directly related to the group delay, Tg as:

Q = Tg × Freq × π (3)

Zooming in on the resonant frequency we can determine that the frequency is 116.88kHz and the group delay is 13.26µS (Fig. 3).

Rearranging Equation (1) to solve for the phase margin as a function of frequency and group delay results in:

Solving for this particular measurement results in a phase margin of:

PM(13.26×10-6, 116.88×103) = 11.726 degrees

The result is very close to the Bode measurement (12.4 deg), and in fact it would be difficult to determine which result is more accurate, though the impedance measurement is arguably much less sensitive to parasitics within the measurement, and in particular does not have an injection transformer response to depend on.

Some network analyzers can display group delay and a select few can perform this mathematical conversion as part of a simple waveform cursor measurement; though manual calculation is possible. You can perform this test using any network analyzer as long as you can extract the output impedance, convert it to group delay and evaluate Equations (2) and (3) or (4).

Phase Margin

Using this same method, a TLV2217 fixed voltage regulator was tested in order to extract the phase margin. In this case, we cannot measure the actual phase margin for comparison using traditional Bode methods, so a small-signal transient step load measurement was used for correlation. The results of the step load test are shown in Fig. 4 while the output impedance and phase margin are shown in Fig. 5. The extracted phase margin is 13 degrees and consistent with the Q factor shown in the load step response.

The step load was injected into the circuit using the same Current Injector used in the output impedance test which works in both the time and frequency domains. In this case, the Current Injector is controlled by an arbitrary waveform generator. Current Injectors are capable of very small and fast load steps (20nS, 40MHz). They do not have the high input capacitive loading associated with an electronic load which, otherwise, can distort the load step measurement.

Of particular interest in the measurement of the TLV2217 with a 22uF chip tantalum capacitor shown in Fig. 4 is the fact that the sensitivity of the Q factor to the load current is clearly shown. While we cannot clearly see the ringing frequencies, the two levels of the load step result in two different frequencies, as well as different Q. For this reason it is important that the measurement be made using the smallest possible load step signals.


References

Erickson, Robert W. and Maksimovic, Dragan. Fundamentals of Power Electronics. sol.: Springer, 2004.

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