A common problem in testing power circuits in general and power-supply ICs in particular is the need for switches capable of withstanding the large current and voltage impulses generated during switching transients. Such switches must be capable of connecting to a variety of circuit topologies.
In some cases, a commercial test load is adequate; otherwise, a unique test setup must be developed. If one side of the switch connects to the power-supply common and that also happens to be the system common, the setup design is simple. Otherwise, the switch driver must be custom designed and that can be quite complicated. Clearly, a switch versatile enough to perform most power-supply transient and fault tests would be quite useful. The specifications for such a switch can be outlined by including the maximum voltage and current ratings, as well as the test needs of most of the medium-range power supplies currently on the market.
The switch should have a current capability exceeding 100 A and be able to sustain an open-circuit voltage of at least 75 V. It must support dual polarity for both current and voltage, because some tests generate ringing currents and some power circuits produce dual-polarity outputs. Turn-on and turn-off speeds should be on the order of tens of nanoseconds to allow observation of the response for fast circuits. Also, both the series resistance and the series inductance of the power switch must be low, which implies a physically small design with a short current path. Last but not least, the switch must be galvanically isolated and have very low output-to-ground capacitance, which is essential if the switch is to be inserted in circuits without distorting their performance or response.
The switch design of Fig. 1 satisfies most of these requirements. It is implemented with a digital isolator coupler whose side-to-side capacitance is less than 1 pF. It also has a total propagation delay of 80 ns and an output rise time of approximately 40 ns. The output stage consists of two low-RDSON MOSFETs capable of handling 75-V, 200-A transients having either positive or negative polarity.
The switching element, the two output MOSFETs in antiseries connection, has a 7-mΩ series resistance and 25-nH series inductance. In the on state, it behaves as a linear resistor for currents of both polarities (including zero crossover) and, therefore, introduces no harmonic distortion performing as a metallic contact. In the off state, it can block up to 75 V of either polarity.
For low-resistance loads that draw currents greater than 50 A, the switching rise time, defined as the on transient, is determined mostly by the series inductance. For lower current ranges, the rise time is below 40 ns and the fall time, the off transient, is primarily a function of the load impedance.
The power supply for the isolated (switch) side of the circuit is a set of three series-connected 3-V lithium-coin primary cells (CR2025 manganese-dioxide lithium cells). For switching rates of a few kilohertz, the 170 mAh nominally available from this battery type should support continuous use for more than a month. For normal bench-test applications, the battery life should be around three months, if left permanently connected.
The input is a 0-V to 5-V digital signal whose only requirements are rise and fall times of less than 20 ns and a minimum pulse width (on or off) of 50 ns. When conducting less than 18 A, the switch can be left in the on or off state indefinitely.
In Fig. 1, IC 1 and IC 2 form an edge detector that applies a narrow positive pulse to either side of the primary of T1 depending on the sign of the input edge. The other side of T1 remains low. T1 pulse polarity depends, then, on the polarity of the input-signal edges applied to the circuit. The secondary of T1 connects across a noninverting logical buffer (input to output) formed by one-half of a dual low-side power MOSFET driver (IC 3). This buffer behaves as a bistable circuit, or flip-flop circuit, that is set in response to a positive pulse at the primary of T1 and reset in response to a negative pulse. The bistable-circuit output is then a replica of the circuit input (the digital input signal applied to the edge detector).
The other half of IC 3, plus the two drivers from IC 4, are all connected in parallel. Their inputs connect to the bistable output and their outputs (connected in parallel) drive the gates of two low-RDSON power MOSFETs (IRFB3077) connected in anti-series, with drains to the outside switch power connections, the two gates connected together and the two sources connected together also. The parallel connection of the three drivers enhances the switching speed of the power MOSFETs, because each one of the IC 2-IC 3 halves can deliver 4 A of peak gate current, which is 12 A for the three combined. The MOSFET sources connect to the negative side of the 9-V lithium battery stack.
The input logic of the MAX5048 allows easy implementation of the edge detector, and the lower static power consumption of the MAX5054s (used as power-transistor drivers) extend the battery life. Consequently, similar but different IC drivers are included on the low side (control and isolation IC 1 and IC 2) and the high side (power drivers IC 3 and IC 4).
Fig. 2 shows an equivalent circuit for the power switch, including the main parasitic components. As for all power circuits, the switch's continuous power-handling capability depends on the heatsinking provided. The inclusion of a heatsink would add considerably to the parasitic output capacitance; however, this design does not include a heatsink.
As compensation when handling 200-A pulses, the pulse widths must be limited to 8 ms and the switching duty cycle limited to a maximum of 0.5%. For 80-A transients the pulses are not package limited and, therefore, can last longer (up to 50 ms), but the duty cycle for 80-A transients should not exceed 3%.
When switching an unclamped inductance at room temperature, the circuit's energy-absorption capability is 280 mJ in a single nonrepetitive pulse, or 200 mJ per pulse with a maximum 1% duty cycle. The coupling transformer is designed for minimum size and interwinding capacitance: one turn in the primary and two in the secondary, wound around a Fair-Rite 2643000801 7.5-mm × 7.5-mm ferrite bead.
The transformer construction also sets the maximum-allowable voltage difference between the switched load and the switch-control circuitry. It can easily withstand 1 kV when constructed with normal magnet-wire insulation, and more than 1 kV if the wire is insulated with Teflon or a similar high-quality, high-dielectric rigidity insulation. For higher voltage isolation, all other aspects of the packaging design should also be reviewed.
T1's ferrite core must be considered conductive and, therefore, not allowed to contact both sides of the switch at the same time. The switch has no interlock protections, so before using it you must verify the condition of the lithium battery, and no circuitry has been included to guarantee the state of the switch on or off) when power is applied. Therefore, you must turn on the power supply for the switch before turning on any other power source for the setup. The switch state is forced by the first transition applied at the input, so the power switch should be cycled on and off at least once before applying power to the rest of the setup.
In Figs. 3, 4 and 5, the top waveform is the digital input and the bottom waveform is a 5-µs pulse observed across a 0.25-Ω resistive load, connected by the switch to a 50-V power supply. Because the waveforms are voltages developed across a short, very low-inductance film resistor, they represent closely the switch-current waveforms. The approximate 200-A pulse shape of Fig. 3 is influenced both in its overshoot and its rise time (60 ns to 80 ns) by parasitic inductance and capacitance in the high current path. Fig. 4 shows the rise time and on-state propagation delay of that pulse. Fig. 5 shows the fall time and off-state propagation delay. Figs. 6, 7 and 8 show the same waveforms for a 5-Ω load and 10-A pulse, operating with the same 50-V supply. The resulting rise time is closer to the MOSFETs' intrinsic switching rise time of 30 ns to 40 ns, as limited by the package and the source inductance.