Power Electronics
Power Bank – Power On-The-Go (Part 2)

Power Bank – Power On-The-Go (Part 2)

In the first part of Power Bank , we looked at the basics of a power bank, described a high-level block diagram, and explored various features commonly available in power banks.  In this part, we will look into details of implementing a power bank using a modern System on Chip (SoC)

SoCs enable greater system integration by providing peripherals like PWMs, timers, ADCs, comparators, amplifiers, and other functions within one device. SoCs like the PSoC 1 from Cypress Semiconductors also provide configurable digital and analog blocks which can be used to implement most of a system’s digital and analog functionalities. The ability to integrate many components into a single SoC, leaving only discrete components like MOSFETs, inductors, diodes, and capacitors off the chip, gives developers greater control over system performance while reducing BOM costs.

To begin, let’s take a look at a detailed implementation of each block discussed in the part 1.

Charger

As discussed previously, a charger should implement both constant current (CC) and constant voltage (CV) control. To implement the Li-Ion charging profile, the following functional blocks are required. 

1.     A switching regulator that can control either the output current or output voltage

2.     Battery parameter (Voltage, current, temperature) measuring circuit

3.     Charging algorithm (for implementing CC-CV profile)

This is shown in block diagram of Fig. 1.

Fig. 1. Block diagram of a Li-ion battery charger
Fig. 1. Block diagram of a Li-ion battery charger

Fig. 2. Switching buck regulator topology
Fig. 2. Switching buck regulator topology

Fig. 2 shows the switching regulator implemented using a buck converter topology.  The buck converter is formed by the MOSFET (T), inductor (L), diode (D) and capacitor (C).  R1 and R2 form a potential divider to measure the battery voltage, and RS is the shunt that is used to measure the battery current.  The output of the switching regulator is controlled by the duty cycle of the PWM.  To implement constant current output, the PWM duty cycle is controlled based on the current measured through RS.  To implement constant voltage control, the PWM duty cycle is controlled based on the voltage measured through R1 and R2.

Battery Parameters

Fig. 3. Measurement using single ended ADC
Fig. 3. Measurement using single ended ADC

Fig. 3 shows the circuit to measure all the battery parameters viz., voltage, current, and temperature.  R1 and R2 provide the battery voltage, and RS provides the battery current.  The battery temperature is measured using a thermistor RT.  Rref and RT form a potential divider.  With Rref being constant, the value of RT can be calculated by measuring the voltage from this potential divider.  Once the value of RT is calculated, the temperature can be easily calculated either by using a lookup table method or by using the Steinhart-Hart method.

Each of these signals requires a different gain.  The flexibility of a programmable SoC architecture makes it possible to change the gain of the amplifier during run-time.

Once the battery voltage, current, and temperature are measured, the CPU implements the charging algorithm to either control the output current or output voltage of the switching regulator by controlling the duty cycle of the PWM.

Charging Algorithm

The CPU implements the charging algorithm.  The CPU reads the battery voltage, current, and temperature and implements the following charging profile.

During main charging, the CPU measures the battery current and adjusts the PWM duty cycle to keep the current constant.  At the same time, the CPU monitors the battery voltage to determine if the battery has reached the full charge threshold.

Once the battery reaches the full charge threshold, the CPU measures the battery voltage and adjusts the PWM duty cycle to keep the battery voltage constant.  At the same time, the CPU monitors the battery current and terminates the charging when the current goes below the termination current threshold.

The constant voltage or constant current control can be implemented using any of the digital control methods like P, PI or PID, depending on the system requirements and the available CPU bandwidth.

ADC and PWM parameters

Some of the parameters that need to be considered during the design are the ADC resolution, ADC accuracy, and PWM resolution. 

ADC resolution defines how precisely you can measure the feedback signals.  This in turn will have an impact on the ripple on the battery current and battery voltage. 

ADC accuracy defines how accurately you measure feedback signals.  For Li-Ion batteries, the battery voltage measurement is critical.  The maximum tolerance allowed for the full charge threshold is 4.2 V + 50 mV.  This will require an ADC accuracy of at least 0.5%.

PWM resolution defines how precisely you can control the output voltage or current, and this also affects the ripple on the output voltage or current.  The higher the resolution, the lower the ripple.  However, there is a limit to how high the PWM resolution can be.  The higher the resolution, the lower the output frequency of the PWM, which results in bigger inductors and capacitors.  As power banks get more compact, size is an important design issue.  So, a tradeoff has to be made between the size and PWM resolution.

Charging Source Detection

As discussed in part one, power banks can be connected to various charging sources like a PC / Laptop or wall power charger for charging the internal battery.  It is important to identify the type of source the power bank has been connected to and draw the appropriate current.

The Battery Charging Specifications BC1.2 defines a method to detect the type of charging source (SDP, DCP or CDP) that the power bank is connected to. 

I.     Primary Detection: Connect 0.6 V on D+ line and measure the signal on D- line. If the signal on D- line is less than 0.4 V, then we are connected to SDP.  If the signal is greater than 0.4 V, then we are connected to either CDP or DCP, and we need to perform secondary detection.

II.     Secondary Detection: Connect 0.6 V on D- line and measure the signal on D+ line. If the signal on D+ line is greater than 0.4 V, then it is DCP else it is CDP.

The above logic may be implemented using the DACs and the ADC in SoCs.  Fig. 4 is the block diagram for charging source detection.  Two DACs are used to generate the 0.6V bias for the D+ and D- lines, and the voltage on the other line is measured by the ADC.  Once the type of charging source is detected, the maximum charging current drawn by the charger section can be set. 

Fig. 4. Charging source detection
Fig. 4. Charging source detection

Boost Converter

The Boost Converter converts the battery voltage to a constant 5 V output to charge the external mobile device.  As the efficiency of the boost converter is required to be >85% under full load condition, a synchronous boost converter is preferred in power banks.  Fig. 5 shows a synchronous boost topology.  A brief description of the boost converter is given below.

Fig. 5. Synchronous boost converter topology
Fig. 5. Synchronous boost converter topology

PWM1 and PWM2 are out of phase signals that drive the low side and high side MOSFETs of the boost converter.  When T1 is on, current flows through the inductor L and the inductor stores energy.  When T1 is turned off (and T2 is turned on), the current through the inductor collapses, which in turn produces back EMF across the inductor. This back EMF in series with the battery voltage presents a higher voltage at the drain of T1.  At this state, T2 is on and charges the capacitor with the higher voltage.  By controlling the duty cycle of T1, the amount of voltage delivered to the capacitor, and hence the output voltage, can be controlled.  The CPU measures the output voltage through potential divider R1/R2 and adjusts the duty cycle of the PWM to regulate the output voltage.

Fig. 6. Boost network circuit
Fig. 6. Boost network circuit

Fig. 6 shows the feedback control circuit for the boost converter.  The CPU measures both the voltage and load current of the boost converter.  The output voltage is measured through potential divider R1/R2.  The CPU implements a PI or PID control loop and adjusts the duty cycle of the PWM.  The loop response of the control loop should be fast enough to prevent overshoot or undershoot in the output when the load current changes.

The CPU also measures the load current from RS to implement overload cutoff and to stop the boost converter when the external mobile device is fully charged and stops drawing current from the boost converter.

Battery Protection

The following are various protections required for Li-Ion batteries:

·      Over-charge protection: The voltage across the Li-Ion battery should never exceed 4.25 V during charging. Charging should be terminated if the voltage exceeds 4.25 V.

·      Over-temperature protection: If the temperature of the battery exceeds 50°C, charging should be terminated.

·      Over-discharge protection: When the battery voltage goes below 3.0 V (some manufacturers go down to 2.8V), the boost converter should be turned off and no further discharge should be allowed from the battery.

·      Overload and short circuit protections: When battery current exceeds a set threshold, discharging should be disabled.

SoCs can implement all of the above battery protections, as the CPU measures the battery voltage and current during the charging and discharging.  However, power bank manufacturers prefer to use dedicated battery protection circuits outside the CPU.  This is to ensure that the battery is always protected, even if the CPU has failed for some reason.  This provides two levels of protection in power banks that use SoCs.

Fig. 7 shows the block diagram of the power bank design implemented using the CY8C24423A device from Cypress’ PSoC 1 family.

Fig. 7. Block diagram of Power Bank using integrated approach
Fig. 7. Block diagram of Power Bank using integrated approach

Table 1 summarizes the advantages of implementing a power bank solution using a SoC compared to conventional solutions based on discrete devices 

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