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In any off-line flyback converter design, it is possible that the output eventually will be shorted by some event, be it customer error or a catastrophic failure downstream. Designers are increasingly using integrated power switches that offer the additional benefits of space and cost savings of combining the MOSFET and controller ICs in one package. In these circuits, as in any other, the short-circuit condition must be safely accommodated by the design.
Figs. 1 and 2 show a basic schematic and the critical waveforms associated with a discontinuous-conduction-mode flyback converter design, respectively. The key to short-circuit protection using an integrated MOSFET/controller IC with internal current sensing is tripping the overcurrent comparator circuit and shutting the MOSFET off as fast as possible, as well as surviving a few pulse-by-pulse current limit cycles without overstressing the MOSFET. It is the time that it takes to realize a short has occurred and turn off the MOSFET that requires careful consideration in the design.
Determining Shutdown Time
The pulse-by-pulse shutdown mechanism takes time. From the time the overcurrent threshold is passed to the time the MOSFET is turned off is the minimum on-time. For example, with Fairchild Semiconductor's Fairchild Power Switch (FPS) IC, this is effectively the total propagation delay plus the MOSFET switching time. As it relates to minimum on-time, the data sheet of this product points out a couple of typical values that don't necessarily spell out the total minimum on-time. These values are the leading-edge blanking time and turn-off delay time.
Leading-edge blanking is often used to blank the leading edge of the sensed current. This avoids false overcurrent trips due to gate-drive currents or hard switching at the drain. Turn-off delay is an inclusive term used to capture logic delays, current-sense delays and switching delays. Since the MOSFET and driver are internal, the MOSFET switching times and driver output currents are not specified. This makes it difficult to correlate the MOSFET and/or driver contribution to minimum on-time.
Unfortunately, during the automated testing of the IC, the test time and site-to-site efficiencies required to screen minimum on-time for packaged parts would make the part cost prohibitive; therefore, the maximum values are not listed in the data sheet and the typical values are given instead.
While current-mode control offers a built-in means to shut off the MOSFET on a cycle-by-cycle basis, there is often a secondary protection mechanism. The FPS MOSFET/IC devices force the IC into a soft-start cycle after a few overcurrent cycles. The part will keep cycling the soft-start mechanism until the short is removed. The goal of cycling soft-start is to reduce the stress on the MOSFET caused by the short circuit.
In general, when the output of the power supply is shorted, the primary current ramps up to higher levels. Eventually, the overcurrent comparator trips and shuts down the MOSFET after the minimum on-time. In the next few cycles, the MOSFET is only turned on for the minimum on-time assuming the short remains in place.
As this is happening, the secondary may not be able to drive enough amp turns to reset the transformer core in these few cycles. This may lead to flux walking in the core and primary current waveforms that appear to be in continuous-conduction mode. If the short remains after these few cycles, the controller will trigger the secondary protection mechanism. These few pulse-by-pulse current-limit cycles must be survived. To survive these cycles, the minimum on-time and the transformer behavior beyond the overcurrent limit value must be understood. This minimum on-time also should be tested and quantified as a part of the power-supply development cycle.
When the FPS IC senses an overcurrent condition, the MOSFET is turned off only after the minimum on-time. When using the FSDM0465 device as an example, if the overcurrent comparator is tripped at 4 A, assuming that the current is ramping up at a linear rate — the switch will open at a current value greater than 4 A. For the sake of this example, let's assume the transformer is not saturated and the switch opens at 5 A, as in Fig. 3. The FPS IC must withstand this current value. In addition, if the flux in the transformer is walking up from cycle-to-cycle as a result of the short-circuit condition not allowing the core to reset, the FPS IC and transformer must be able to handle the elevated peak current safely.
It is also possible to drive the transformer into saturation during overcurrent, but it is imperative that the designer understand the ramifications of this decision on the switch current. To revisit the recent example, let's say that the transformer saturates at 4.5 A, at which point the primary inductance drops to 10% of the initial value (LLK = (0.1)LMAG). By doing this, assuming a relatively square corner on the BH curve, the switch would then open at roughly 9.5 A (Fig. 4). Again, the switching MOSFET must handle this condition. The current in the saturated transformer is much higher. This may be acceptable in a given design, but the consequences must be understood and the minimum on-time of the FPS must be known.
The design goal is to choose an FPS device such that the minimum stated primary current-limit point falls just above the worst-case load condition at minimum line voltage. If the designer has a high crest factor load, this may not be possible. It may then be necessary to choose a minimum current trip value that is much higher than the nominal load. The transformer must safely accommodate this higher current, as well as the current value at which the switch opens on short-circuit testing.
Designing for Robustness
Short-circuit protection in off-line converters is a requirement in virtually every design since a short will occur at some point in the life of the product. Short-circuit protection in off-line flyback converters with Fairchild FPS ICs is a viable solution that can be easily used. To use this feature requires a thorough understanding of the overcurrent trip point and the minimum on-time. The minimum on-time of the IC must be verified at design and the transformer must accommodate this minimum on-time at high line conditions. Additionally, the MOSFET must accommodate the transformer current with the output shorted for a robust design.