Power Electronics

Wide Input Range Dual PWM Controller

Intersil Corp.’s new ISL6227 is a dual PWM controller IC designed to power DDR memory, graphics, chip sets and other systems in notebook PCs. Its wide input voltage range capability allows for voltage conversion directly from an ac-dc adaptor, from the Li-ion battery pack or from system 5-V or 3.3-V buses. The ISL6227 is a pin-compatible performance upgrade for the ISL6225.

The ISL6227 dual PWM controller delivers highly efficient and precise voltage regulation. Automatic mode transition of constant-frequency synchronous rectification at heavy load, and hysteretic (HYS) diode-emulation at light load, assure high efficiency over a wide range of conditions. The HYS mode of operation can be disabled separately on each PWM converter if constant-frequency continuous-conduction operation is desired for all load levels. Efficiency is further enhanced by using the lower MOSFET’s RDS(ON) as the current sense element.

Voltage feed-forward ramp modulation, current-mode control and internal feedback compensation provide fast response to input voltage and load transients. Input current ripple is minimized through the use of a channel-to-channel PWM phase shift of 0, 90 or 180 degrees and is determined by theVin pin voltage and the status of the DDR pin.

The ISL6227 can control two independent output voltages adjustable from 0.9 V to 5.5 V. By activating the DDR pin, the ISL6227 is transformed into a complete DDR memory power supply solution. In DDR mode, the channel 2 (CH2) output voltage (VTT) tracks at half the channel 1 (CH1) output voltage (VDDQ). The CH2 output can both source and sink current, an essential power supply feature for DDR memory. The reference voltage (VREF) required by DDR memory is generated as well.

In dual power supply applications, the ISL6227 monitors the output voltage of both CH1 and CH2. An independent power good (PGOOD) signal is asserted for each channel after the soft-start sequence has completed and the output voltage is within the PGOOD window. In the DDR mode, CH1 generates the only PGOOD signal.

Built-in overvoltage protection prevents the output from going above 115% of the set point by holding the lower MOSFET on and the upper MOSFET off. When the output voltage re-enters regulation, PGOOD goes HIGH and normal operation automatically resumes. After the soft-start sequence has completed, undervoltage protection latches the offending channel off if the output drops below 75% of its set point value. Adjustable overcurrent protection monitors the voltage drop across the RDS(ON) of the lower MOSFET. If more precise current-sensing is required, an external current sense resistor can be used.

For more information, visit www.intersil.com.

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