Power Electronics
Switch-Mode Power Supplies for Beginners: An Efficiency Primer Part 2

Switch-Mode Power Supplies for Beginners: An Efficiency Primer Part 2

In the second part of this two-part article, the authors describe how to determine the efficiency losses associated with passive components and how features offered by controller ICs can be used to mitigate SMPS losses.

In part 1 of this article, the inefficiencies incurred by the MOSFET and the diode of the generic switch-mode power supply (SMPS) were examined. The conductive losses presented by the static characteristics of each of these devices, as well as the switching losses developed by their dynamics, proved to be main contributors to the power loss found in these types of circuits.

However, while high-quality switching devices can offer a much-improved efficiency score, they are not the only components that can be optimized to improve the efficiency of the SMPS circuit.

Fig. 1 details the basic components found in a typical IC-based stepdown converter. The control IC integrates two synchronous, low RDSon MOSFETs, and achieves a high efficiency — up to 97%.

In this circuit, the switching components are already chosen and optimized for the application. However, to maximize the overall efficiency potential, designers should turn their attention to the passive elements, namely the external inductor and capacitors since these passive components contribute a share of the power loss. Additionally, designers should be familiar with IC features and tradeoffs that can further enhance circuit efficiency.

In this article, the losses introduced by the capacitors and the inductor in the SMPS circuit will be discussed along with some popular SMPS IC features that are commonly seen in high-efficiency SMPS ICs.

Issues with Inductors

Power loss in an inductor is described by two basic phenomena: winding loss and core loss. Winding loss is due to the dc resistance (DCR) of the coil of wire used to make the inductor, while core loss depends on the inductor’s magnetic characteristics.

DCR is defined by the following well-known resistance equation:

DCR = ρ (ℓ/A)

where ρ is the resistivity of the wire’s material, ℓ is the length of the wire and A is the wire’s cross-sectional area.

Therefore, it is expected that DCR will increase for a longer wire and decrease for thicker wire. This principle can be applied to standard inductors to determine what to expect for different inductance values and case sizes. For a fixed inductance value, as inductor case size is reduced, DCR tends to increase since the cross-sectional area of the wire must decrease to fit the same number of turns. For a given inductor case size, DCR usually decreases for smaller inductances, since a shorter, larger gauge wire is used to accommodate a smaller number of turns in the case.

Knowing the DCR and the average inductor current (dependent on the SMPS topology), the inductor resistive power loss (PLdcr) can be estimated as:

PLdcr = ILavg2 X DCR,

where ILavg is the average dc current flowing through the inductor. For the stepdown converter, the average inductor current is the dc output current. Although the magnitude of DCR directly affects the resistive power loss encountered in an inductor, power loss is related to the square of inductor current, as seen in the previous equation. Therefore, it is essential to minimize DCR to counter the effect of inductor current on power loss in higher-current SMPS systems.

Core loss, on the other hand, is not as straightforward as conduction loss, and is more difficult to measure. It is composed of hysteresis and eddy current losses that are a direct result of the changing flux in the core. In an SMPS, although an average dc current flows through the inductor, ripple current due to the ac variation of switching voltage across it causes cyclically changing magnetic flux to be present in the core.

Hysteresis loss stems from power expended in the realignment of core magnetic dipoles each ac half cycle, and can be viewed as a “frictional” loss as dipoles rub against each other as the magnetic field changes polarity. It is directly proportional to frequency and flux density.

Conversely, eddy current loss is introduced by the time-varying magnetic flux present in the core area. Faraday’s law informs us that time-varying flux in the core produces a time-varying voltage. In turn, this varying voltage causes localized currents, which produce an I2R loss dependent on core resistivity.

Core material contributes significantly to the magnitude of core loss, and several material types are available. For powder cores commonly used in SMPS inductors, molypermalloy powder (MPP)-type cores tend to have the lowest core loss, while iron powder cores usually have the highest.

Core loss can be estimated by calculating the peak change in flux density (B) in the core and then consulting B (core flux) versus core loss (and frequency) plots provided by the inductor or core manufacturer, if available. Peak B can be calculated several ways, and equations are sometimes found alongside the core-loss curves in inductor data sheets.

Alternately, if the area of the core and number of windings are known, the follow equation can estimate peak core flux:

B = (L X ΔI X 108 / 2 X A X N) ,

where B is the peak core flux (gauss), L is the coil inductance (Henries), ΔI is the peak-to-peak inductor ripple current (amps), A is the cross-sectional core area (cm2) and N is the number of turns.

With the increased usage of the Internet for downloading data sheets and researching component information, some manufactures have made available interactive inductor power-loss software to help the designer estimate power loss. Consulting these tools can yield a quick and accurate estimation of the losses incurred in the application’s circuit. For example, Coilcraft (www.coilcraft.com) has made available an online inductor core and winding loss calculator that estimates core and copper loss for a chosen series of inductors by simply keying in a few values.

Capacitor Losses

Contrary to the ideal model of a capacitor, the actual physical characteristics of this element cause it to fall prey to several loss mechanisms. These losses nibble away at SMPS efficiency since capacitors are used in the power circuit of the SMPS to stabilize voltage and filter the noise of both the input and output (Fig. 1). These losses are characterized by three dissipative phenomena: series resistance, leakage and dielectric losses.

The resistive losses of the capacitor are evident. Since current flows into and out of the capacitor during each switching cycle, the intrinsic resistance (RC) of the metal terminals and plates in the capacitor will present a resistive power loss. Leakage is plainly described as that small current that flows “across” a capacitor due to the noninfinite (although very high) resistance of the capacitor’s insulation (RL), and dissipates power within it.

Dielectric losses are more complex, and include the energy lost as the dielectric molecules are polarized by the capacitor’s changing electric field due to ac voltage applied across it.

All three of these losses are represented in the typical loss model of a capacitor (left portion in Fig. 2), using resistances to depict each dissipative mechanism. The fractional power dissipation presented by each loss, in relation to the stored energy of the capacitor, is termed dissipation factor (DF), or tangent of the loss angle, δ. The DF of each loss mechanism is found by comparing the real portion of the capacitor’s impedance to its imaginary part when each loss mechanism is individually inserted in the model.

For simplification of the loss model, the contact resistance, leakage and dielectric losses of Fig. 2 are lumped together into an individual real power-loss element termed equivalent series resistance (ESR). ESR is defined as that portion of the capacitor’s impedance that is responsible for the overall real power loss in the capacitor.

In mathematically manipulating the impedance model of the capacitor, and solving for ESR (which is the real portion of the result), it is seen that ESR is frequency dependent. This dependence is demonstrated in the following simplified ESR equation:

ESR = (DFR/2fC) + (DFL/2fC) + (DFD/2fC) = RC + 1/(RL(2fC)2) + DFD/2fC ,

where DFR, DFL and DFD are the dissipation factors specific to contact resistance, leakage and dielectric loss, respectively.

Using this equation, it is observed that as the frequency of the applied signal increases, leakage loss and dielectric loss both shrink until contact resistance dominates at high frequencies — up to a point. Beyond this point (not indicated in the equation), ESR tends to increase for very high frequencies due to the skin effect of ac current.

Many capacitor manufacturers offer ESR plots to characterize the ESR values over frequency. For instance, TDK (www.component.tdk.com) offers ESR curves for a majority of its capacitor products, and ESR values can be obtained by referring to these plots with switching frequency in mind.

However, if ESR plots are not available, ESR can be roughly estimated by using the total DF specification listed in capacitor data sheets. This DF is the total DF of the capacitor (including all loss elements). ESR is then estimated by:

ESR (DF / 2fC) .

Whichever method is used to obtain an ESR value, it is intuitive that high ESR results in less efficiency being retrieved from the SMPS, since input and output capacitors charge and discharge ac currents through ESR during each switching cycle. This results in I2RESR power losses. This power loss (PCAPesr) is calculated as:

PCAPesr = ICAPrms2 X ESR ,

where ICAPrms is the RMS value of the ac current flowing through the capacitor. For the stepdown circuit, assuming the output capacitor permits all ripple current to pass, the RMS value of inductor ripple current is used.

Obviously, to minimize capacitor power loss, low-ESR capacitors are chosen. SMPS with larger ripple currents especially benefit from low-ESR capacitors. Also, since ESR is the main contributor to output-voltage ripple, selecting a low ESR capacitor offers much more of a benefit than improved efficiency alone.

In general, different dielectric-type capacitors are characterized by certain levels of ESR. As a rule of thumb, for a given capacity and voltage rating, aluminum electrolytic and tantalum capacitors are distinguished by higher values of ESR than their ceramic counterparts. Polyester and polypropylene capacitor ESR values usually fall in between.

For a given type of capacitor, observing the ESR equation above, larger capacitances and lower DFs offer lower ESR. Larger case sizes often reduce ESR as well, but at the expense of performance due to increased series inductance. Additionally, lower capacitor voltage ratings will tend to reduce ESR.

SMPS IC Tradeoffs

The selection of an SMPS IC can bring about good opportunity for exceptional efficiency numbers, especially if that particular IC has efficiency enhancements included in the package, design or control architecture.

The integration of switching devices into the IC package not only offers the advantage of eliminating the time required for MOSFET or diode selection, but it can improve efficiency by making the circuit area more compact, thereby reducing trace losses and other parasitics generated by a looser circuit design. Depending on the power level and process limitations, the MOSFET, diode (or synchronous MOSFET), or both can be integrated into the product.

One important IC specification that demands attention is quiescent current (IQ), which is the current required to support the device itself. The efficiency effects of IQ are relatively unseen for heavier loads (greater than about one or two magnitudes of IQ), since load current swamps IQ. However, as load current decreases, efficiency begins a downward trend, since power loss due to IQ is a larger percentage of overall power transfer from the source.

While ICs are generally designed for low IQ, some products tout extremely low IQ, and are geared toward portable or battery-powered applications. Some ICs offer selectable operating modes that reduce IQ, making them more suitable for applications with sleep or other low-power modes.

The control architecture of an SMPS has a significant effect on the potential efficiency of the SMPS. This was seen with synchronous rectification control as discussed in part 1 of this article, where the larger power loss exhibited by the switching diode was replaced with a much lower loss of a MOSFET.

Another common control technique that is important for converters operating in light-load regions is pulse skipping. Unlike pure PWM switching, where the regulation scheme requires a constant switching frequency regardless of heavy or light loads, pulse skipping allows the controller to skip switching cycles. This action prevents unnecessary energy transfer that would ultimately reduce efficiency.

When pulses are skipped, the inductor is allowed to discharge for a longer period of time, and more energy is transferred from the inductor to the load to maintain the output voltage. Naturally, the output voltage bleeds down according to the current draw of the light load. Once the low-voltage regulation threshold is reached, a new switching cycle is initiated to recharge the inductor and refresh the output voltage from the input supply.

Keep in mind that pulse skipping creates output noise dependent on the load. This makes noise more difficult to filter, since switching noise does not occur at constant intervals as with constant PWM control.

Advanced SMPS ICs often combine the benefits of constant-frequency PWM at higher loads with the enhanced efficiency of pulse skipping at light loads. The IC depicted in Fig. 1 is such a device.

As loads increase to higher active values, pulse skipping waveforms transition to constant PWM, with noise easily being filtered during the normal operating load. The overall effect is maximum efficiency over the entire operating range, as demonstrated in the example efficiency curves of a typical stepdown converter with selectable pulse-skipping and PWM modes (Fig. 3).

The constant PWM operation of curves D, E and F shown in Fig. 3 exhibit low efficiency at lighter loads, but offer tremendous efficiency (up to 98%) for higher loads. For light loads, the IC switches whether or not the load requires it, thus wasting power and yielding the low efficiencies indicated. For higher loads, the energy penalty of maintaining PWM switching is small when compared to the load, causing power losses to be overshadowed by the output power, forcing efficiency to be high.

On the other hand, the pulse-skipping “idle mode” efficiency of curves A, B and C maintain a high value of efficiency even down very light loads since switching occurs only as required by the load. For the 7-V curves, that’s more than a 60% efficiency improvement for 1-mA loads.

Maximizing SMPS Potential

Although switch-mode power supplies are popular for their very high efficiencies, the efficiency is ultimately limited by intrinsic losses present throughout the SMPS circuit. But by carefully considering fundamental SMPS losses while pouring over the data sheets of selected SMPS ICs and supporting components, the engineer can expect to make well-informed choices that maximize SMPS efficiency to its full potential.

For Additional Reading

Eichhorn, Travis, “Estimate Inductor Losses Easily in Power Supply Designs,” Power Electronics Technology, April 2005.

Application Note, “Equivalent Series Resistance (ESR) of Capacitors,” Quadtech Inc., www.quadtech.com.

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