System efficiency is an important consideration when inverters are used in photovoltaic, UPS, and motor drive applications. One approach to achieving improved efficiency is to replace the usually-used two-level inverters with a three-level configuration, also known as a neutral point clamped (NPC) inverter. Although three-level inverters have added complexity, partitioning the circuits in modules according to their power handling requirements can overcome circuit complexity disadvantages.
To understand the partitioning process, we first have to look at the three-level inverter topology shown in Figure 1. Each leg has four IGBTs connected in series. The applied voltage on the IGBT is one-half that of a conventional two-level inverter. This allows use of 600V IGBTs in 460VAC applications instead of 1200V devices required in conventional two-level topologies. The bus voltage is split in two by the connection of equal series-connected bus capacitors. Each leg is completed by the addition of two clamp diodes. These diodes are connected to the mid-point of the dc bus to insure that the voltage across any single IGBT never exceeds one half of the dc bus voltage. This topology can produce three voltage levels on the output: the dc bus plus voltage, zero voltage and dc bus negative voltage. In contrast, a two-level inverter can only connect the output to either the plus bus or negative bus.
The three-level inverter has advantages over the more common two-level inverter shown in Figure 2. For example, three-level inverters have smaller output voltage steps that reduce potentially damaging stresses on motors in applications with long power cables. This capability can eliminate surge voltages and high dv/dt at the motor terminals and excessive motor shaft bearing currents. Also, the three-level inverter has an effective modulation frequency twice that of a conventional inverter, so it offers a cleaner output voltage waveform. Plus, a two-level inverter operating at the same modulation frequency requires larger filter components.
Now that we have compared the two-level and three-level inverter configurations, we can look at the three-level type in greater detail. One leg of the three-level inverter has designations assigned to each component (Figure 3). When IGBT Q1 and Q2 are turned on, the output connects to VP. When Q2 and Q3 are on the output is connected to VO. When Q3 and Q4 are on the output connects to VN.
Table 1 lists the normal switching states for the four IGBTs. Clamp diodes D4 and D5 connect to the neutral point. From the switching states, we can deduce that IGBTs Q2 and Q3 are on for most of the cycle, resulting in greater conduction loss than Q1 and Q4 but far less switching loss. In addition, the free wheel diodes for Q2 and Q3 are for most cases, soft switched as the IGBT parallel to the diode is on, thus holding the recovery voltage across the diode to that of the IGBT VCE. The dc bus capacitors are connected in series and establish VO, the mid-point voltage. Due to available capacitor voltage ratings, series-connected capacitors are generally required anyway in inverters rated for 480Vac to 600Vac. Maintaining the voltage balance between the capacitors is important for proper operation of three-level inverters. This is usually accomplished by adjusting the PWM duty slightly if the voltage becomes asymmetric.
Figure 4 shows the leg output voltage and Figure 5 is the phase-to-phase output voltage. Note that the effective switching frequency of the phase-to-phase voltage in Figure 5 is twice that of the phase voltage shown in Figure 4. This means that a two-level inverter would need to operate at twice the switching frequency of a three-level inverter in order to achieve the same ripple in the output current. This fact, combined with the intermediate voltage steps of the three-level inverter allows a significant reduction of switching losses and smaller output filter components.
As noted previously, the main drawback of implementing a three-level topology is that the additional power devices increase the power circuit complexity. One effective way to reduce the complexity is to partition modules specifically configured for the three-level topology. To cover a range from 25A to 600A, new modules containing four different circuit topologies were developed. For the low power end, 10A through 75A, the complete three-phase, three-level circuit shown in Figure 6a was implemented in a single package. For the mid-range, 110A to 200A, a complete three-level inverter leg as shown in Figure 6b was implemented in a single package. And for the high power range from 300A to 600A, upper (Figure 6c) and lower half (Figure 6d) leg modules were developed. Figure 7 shows the four different module packages.
Powerex and Mitsubishi developed software tools for inverter loss estimation. The TLISIM program analyzes operation of a three-level, three-phase inverter and calculates the losses and temperature rises for Powerex TLI modules. First, go to the Powerex website: www.pwerx.com. Then, click on the TLISim icon on the right side of the home page. This brings you to a page that includes “Download TLI Simulator” and also “TLI Simulator Start Guide.” Clicking on the appropriate line will provide the TLISIM.exe program and the “Guide.”
After installing the program, click the TLISIM.exe file to start the program. The opening dialog box appears on your screen.
The steps needed to run a simulation are: Click the Target Device drop down box and a list of available three-level modules will appear. Select a module by clicking on the part number. In the graphic in the lower right hand corner, the circuit topology for the module will appear. Note that small current modules will have the entire three-level inverter, whereas higher current modules contain a single inverter leg, some contain a half leg.
Then, enter the operating conditions. Click the start button to run the simulation. In the lower left-hand graphic, the phase-to-phase output voltage will appear as the simulation proceeds. When the output waveform is complete, device power losses will appear along with temperature rises and absolute temperatures. This information is displayed in appropriate boxes in the Power Losses (Average) area and in the Temperature Rises (Average). You may change any condition or even the module without restarting the program.
After each simulation, you may create an output file by clicking the “Output File?” button. You will be requested to supply a file name. A text file will be created showing all operating conditions and results. You may request an output file after each simulation, but only the last simulation run will be in the printer buffer so if you perform multiple simulations and request an output file, only the last simulation will be in the file.
To compare the performance of the new three-level inverter modules to a conventional a two-level design, we can use this loss simulation software. For example, assume we are designing a 460Vac, 250HP motor drive. The two-level inverter will be constructed using three CM600DY-24A fifth generation 1200V, 600A dual IGBT modules.
The three-level inverter will use six of the Powerex CM600YE2(N,P)-12F half leg modules. For comparison purposes, the two-level inverter uses a modulation frequency of 10kHz and the three-level inverter uses a modulation frequency of 5kHz. These modulation frequencies are used so that the inverters have approximately the same output waveform quality. For 250HP, the drive will have a nominal output current rating of 300Arms at a power factor of 0.9.
Assuming that the controller modulation depth is 0.85, the dc bus 700V and the heat sink temperature is 90 °C, Figures 8 and 9 show the loss simulation results. For the two-level example, the total power loss in each IGBT module is 1650W. The complete inverter using three of these modules would have total losses of 4950W. The three-level inverter simulation shows total losses in each IGBT module of 406W. The complete inverter using six of these modules will have total losses of 2436W. Therefore, total losses for this example have been cut in half compared with the two-level inverter. In terms of efficiency, this is an increase from 98% for the conventional two-level topology to 99% for the three-level topology.
|IGBT||VOUT = VP||VOUT = VO||VOUT = VN|