Power Electronics

Synchronous Rectifier Controller IC Supports Efficiency at Higher Output Current

OEMs want more and more functionality for electronic systems ranging from handhelds to super-scale telco switches, which employ semiconductors operating at lower and lower voltages. The result is that power engineers must deliver high currents at low voltages, where conventional dc-dc converters are least efficient. This challenges designers to produce efficient high-current, low-voltage converters without consuming more p. c. board real estate. Synchronous rectification promises a solution, however, the task isn't easy. The challenges include the following.

  • Driving multiple devices in parallel to handle high output currents.
  • Providing sufficient voltage from the transformer to drive the synchronous rectifier power MOSFETs over their operating range.
  • Dealing with system noise caused by switching high currents.
  • Dealing with stray inductance.
  • Minimizing MOSFET switching and body diode losses.


Better Efficiency

New products and techniques can make better efficiency possible. One approach is to use synchronous converter drivers for a dc-dc converter, as shown in Fig. 1. This design has provided better efficiency at 40A output than earlier designs do at 20A.

The driver is a single-ended forward converter with the following specifications.

  • Maximum output current: 40Adc.
  • Input voltage range: 48Vdc ±10%.
  • Output voltage range: 1.5Vdc ~1.8Vdc (adjustable)
  • Switching frequency: 200 kHz
  • Synchronous rectifiers: IRF7822 (30BV, 12Vgs, 6.5mΩ [max], SOIC-8) six used in parallel in each leg with 1Ω gate resistors and pnp turn off.
  • One 1.5-in. × 1.2-in. × 0.3-in. heat sink covers all output devices.


In an extension of an earlier layout, the design incorporates split transformers in the primary and paralleled secondaries [1]. This scheme is significant for reducing ohmic losses in the secondary due to lower currents in each transformer; core losses due to the lower voltage applied to the primary; and output leakage inductance due to the use of paralleled secondaries.

In addition, the design allows for reducing output voltage without adding turns to the secondaries, which can result in using fewer p. c. board layers when using embedded planar transformers. The primary disadvantage is the requirement for two or more cores; however, they are relatively small.

Efficiency

Built on a 9-layer p. c. board (3 oz copper per layer) this converter uses eight layers for the main transformer outputs (see Fig. 1 on page 22). The ninth supplies 5Vdc for the IR1176 synchronous rectification IC.

Fig. 2 shows the efficiency of the converter for two output voltages (1.5Vdc and 1.8Vdc) over the entire current range. Vin is 48Vdc, as might be used in a telecommunications application. While other designs yield about 83% efficiency at 20A, this design yields 87% at 20A and 1.5V, and 84% at 40A.

The synchronous rectifier driver is the IR1176, a new member of a family of controllers. [2-5]

The IR1176 derives the necessary gate drives for the secondary power MOSFETs from the transformer outputs through a pair of modified phase-locked loops (PLLs). The PLLs also provide advanced gate drives (prefiring) with respect to the primary switching device driven by the system PWM. Like others in its family, the IR1176 is a stand-alone device, requiring no additional ties between the primary and secondary sides. It provides pin and package compatibility with the IR1175 (SSOP-20); 4A peak source and sink current for fast switching of multiple paralleled power MOSFETs; and input and output pins with increased noise immunity to better withstand the noisy environments of high power converters.

Adjustable parameters of the IR1176 include the dead time between drive signals and the prefire timing.

Any challenge to using the converter design comes from estimating and refining the timing for external components. You can accomplish this by using the procedures in the IR1176 datasheets for determining initial settings, and then refining those settings through experimentation.

For efficient operation, use the following basic information to calculate the required external components.

  • Operating frequency: ~200 KHz.
  • Set loop filter center frequency to ~1/10 of switching frequency (20 kHz).
  • Set damping factor to 0.707 (critically damped).
  • Advance prefiring of each synchronous rectifier and devices in parallel in each leg.
  • Dead time required for each transition: power transfer to reset cycle and in reverse.


RVCO1 and RVCO2 (Fig. 1) determine the center frequency of the capture range of the PLLs, which is the same as the switching frequency. The procedures in the IR1176 data sheets ensure that:

Rvco (kΩ)= {100 × Vchgpump(Vdc)/fvco(kHz)× Kvco_dc (kHz/Volt)}

Where:
Vchgpump= 1.5Vdc (as specified in the data sheet)
fvco =200 kHz switching frequency
Kvco_dc =62 kHz/V (as specified in the data sheet)
Therefore, Rvco1 and Rvoc2=~47kΩ.

For the PLLs, we chose a slightly larger center frequency of ~27 KHz to allow experimentation over a wider range of frequencies. With a damping factor of 0.707 the resulting loop filter is a 27kΩ resistor in series with a 270 pF capacitor, which are in parallel with a ~22 pF capacitor.

The IRF7822 Power MOSFET requires ~28nC of gate charge to turn on. Considering there are six devices in parallel in each leg each with 1Ω gate resistors, the peak turn-on current available for each device is then:

Ion=[Vdd/(internal IR1176 resistance+total gate resistance)]/6=[5/(1.25+1/6)]/6=0.588Adc.

Where:
Vdd=5Vdc

Each device turn-on time will be:
ton=Qgs/Ion=28 × 10-9/0.588 =47.62 ns

You can use this ton to find an initial setting for RADV1 and RADV2 (from the IR1176 data sheet) this number translates to 4.1kΩ for the two advance resistors. Adjust this value to account for delays associated with zener capacitance or other networks on X1 or X2 inputs.

Dead time settings help to avoid shorting transformer outputs during transitions from one power cycle to another, due to the power MOSFETs finite turn-off times. Excessive dead times force the output current into body diodes of the synchronous rectifiers, increasing losses and reducing efficiency. Thus, a minimum dead time is best. We recommend fast turn-off mechanisms such as pnp pull downs.

Another observation of this topology finds that during transition from the reset cycle (primary switch off) to the power transfer cycle (primary switch on) the output of the transformer is zero, and there's no danger of shortage. You can set the dead time for this transition to zero.

Experimentation is the best way to find the minimum dead time setting for the power transfer cycle to reset cycle transition because it's based on the turn-off time of the power MOSFETs and the particular scheme used. You can set this to a large value initially (e.g., 2X to 4X the anticipated turn-off time, 200 ns in this case) and reduce experimentation to a minimum to avoid transformer shoot-through currents under various line and load conditions.

Final Timing

The table lists the final values for the timing components. Fig. 1 shows the final design of the 1.8V, 40A, 70W module. Figs. 3, 4, and 5 show the secondary side waveforms of the converter.

The IR1176 can be used in all converter topologies requiring continuous complementary drive signals. Applications include single-ended, dual transistor forward configurations and some push-pull converters with catch diodes in the secondary.

Its extended performance is due to the IR1176's ability to extend gate drive for the entire duration of the power cycle, and to enable prefiring of the circuit to reduce body diode conduction. Its ability to source and sink 4A allows increased current carrying capability by driving more devices in parallel. These capabilities contribute to increased converter efficiency at high power levels those designers of next-generation equipment need.

References

  1. Ionel Dan Jitaru, “Planar Magnetic Technologies — Seminar 4,” Rompower, PCIM International Conference.

  2. Edgar Abdoulin, “An Innovative Method for Controlling Synchronous Rectifiers Boosts Supply Efficiency,” HFPC 1999 Proceedings, pp. 76-85.

  3. Edgar Abdoulin, “Integrated Controller IC Boosts Efficiency of Synchronous Rectifier-Based Converter,” PCIM Power Electronic Systems, March 2000.

  4. Michael Wiemer, “Stability Analysis of DC/DC Forward Converters Using the IR1175.” Available from International Rectifier Corp., June 5, 2000.

  5. http://www.irf.com



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