In Part 1 of this two-part series, we discussed the key stresses in the three conventional dc-dc converter topologies relating to the inductor and the input and output capacitors. We indicated what input voltage would represent the worst case for design/test purposes.
In this part, we extend the discussion to the switch and diode through the extended design table (Table 1, on page 40). We can also plot the variation functions for each parameter in Fig. 1, and then summarize the findings into a quick lookup table (Table 2, on page 42). Remember that for all topologies, low D corresponds to high-input voltage and vice versa.
Switch RMS/Avg Current
For a MOSFET switch, we need to calculate the conduction loss as given by I2rms × RDS(on). The crossover losses are lowest at the minimum input voltage. However, because they are usually a small fraction of the conduction losses, we can ignore them. The Irms of the switch varies in the following manner:
From Table 1, for small r, we can see:
By plotting these functions, we can see that Irms⇒ maximum at lowest input voltage for buck/boost/buck-boost.
For a buck, the dissipation in the switch at low input voltages goes up only slightly, but for the remaining topologies, you can expect this dissipation will go up steeply at low-input voltages, leading to a large drop in efficiency. Table 1 also provides the average switch current for calculation of dissipation in bipolar switches. The above conclusions for rms current are also valid for the average value of the switch current (required to calculate the conduction loss for a bipolar switch).
The other main loss component in a power supply is the diode, whose forward loss is IAVG × VD, where VD is the drop across the diode when it conducts. For the boost and the buck-boost, the average diode current is the load current, so it is not going to change with duty cycle (for a constant load). But for the buck it varies. From Table 1:
IAVG Ý (1 - D)
IAVG Ý constant
Plotting these in Fig. 1, we see:
IAVG⇒ maximum at highest input voltage for buck.
IAVG⇒ constant for boost/buck-boost.
The dissipation in the switch of a buck remains almost constant as input voltage increases; however, we now see the diode dissipation increases as we do so. Thus, we expect the efficiency of a buck regulator to fall at high-input voltages on account of increased diode dissipation (assuming the drop across switch is less than the drop across the diode). For the boost and buck-boost, the diode dissipation does not change as input voltage falls, but the switch dissipation increases dramatically. So, we expect the efficiency of a boost or a buck-boost to fall at low input voltages on account of increased switch dissipation (unless crossover losses are very large, in which case the reverse is occasionally found to be true).
For diode temperatures, we must test a buck regulator at the highest input voltage. For the other topologies, it does not matter. This is shown as VIN in Table 2, on page 42, implying any input voltage.
Peak switch current is important because every controller has a current limit for the switch. If the calculated peak exceeds the lowest value possible of the switch current limit anywhere in the input voltage range, the circuit can't deliver required output power. The peak current in a buck is just a little higher than the load current. For example, the LM2593HV step-down (buck) regulator IC is designed for 2A load, and has a minimum set value of 2.3A for the switch current limit. Yet, as you can see in Fig. 2, on page 42, and from the datasheet of this device, this buck IC can be operated as a positive-to-negative regulator, which is a standard buck-boost topology. In this mode, the peak current values are much higher, as seen in Table 1, and depend on the load and duty cycle/input voltage. Now, let's see how the peak current values vary for all the topologies, with changes in input voltage.
From Table 1, for small r, we can see that the peak current as:
Plotting these functions, we will see that for the boost and the buck-boost the peak value of switch current occurs at maximum duty cycle (minimum input voltage), whereas for the buck this occurs at lowest duty cycle (highest input voltage). Therefore, you must test current limit at minimum input voltage for the boost and the buck-boost — at the highest input voltage for the buck. We conclude:
IPEAK⇒ maximum at highest input voltage for buck.
IPEAK⇒ maximum at lowest input voltage for boost/buck-boost.
This tells us that the designer can always use Table 1 to calculate the peak current, but for the worst case, he must do so at the lowest input voltage for the boost and buck-boost to ensure the calculated peak is less than the current limit. For a buck, we must calculate the peak current and compare it to the current limit at the highest input voltage.
We have presented the proportion by which each of the parameters varies, with respect to duty cycle (and input). These variation functions provide a clearer idea of the shape and extent of the variation, as plotted in Fig. 1, normalized to unity at D = 0.5, which serves as a reference point. Table 2 summarizes the results. For example, considering the inductor energy, we can see from this table that the curve we need to refer to is No. 1 for boost and buck-boost, whereas it is No. 8 for the buck. From Fig. 1, we go to curve No. 1 to see how steeply the inductor energy goes up as D increases (low-input voltage). On the other hand, curve No. 8 for the buck regulator shows: It hardly matters at what input voltage we design the inductor.
For example, use the LM2593HV (5V fixed output version) to generate a -5V output from an input voltage ranging from 4.5V to 20V. This is a 150 kHz buck regulator IC with a switch current limit of 2.3A (min). What is the maximum load it can deliver in this positive-to-negative configuration? (Assume VD = 0.5V and VSW = 1.5V.)
The inductor design must be at the minimum input (for example, 4.5V for a buck-boost topology according to the guidelines in Table 2). We fix an r of 0.3 as this always represents an optimum size for the inductor. The duty cycle is calculated from the equation in Table 1, on page 40.
The worst-case peak current in the switch for a buck-boost (which this is) corresponds to the curve No. 5 from Table 2. Looking for this curve in Fig. 1 shows that this reaches its maximum at high duty cycle (low-input voltage). Therefore, we can proceed with this peak switch current calculation at the minimum input voltage, at which we'll also perform the inductor design.
So setting IPEAK = 2.3A, we can solve for IO:
IO = 0.7 A
Therefore, we can assure ourselves of only a maximum load of 0.7A in this configuration. You can evaluate the required L from the table in the first part to this article, “Reducing Converter Stresses — Part 1: Passive Components,” on page 20 of the May 2002 issue of PETech, where we presented the inductor equations, namely:
L = 21.4 μH
This is the minimum inductance required for the application. If the inductance is lower than this, the calculated peak current may exceed the current limit of the device, and if the inductor starts saturating, it may eventually cause protective foldback of the IC to occur. Remaining parameters/ratings can be calculated in a similar way, by referring to the guidelines in Table 2 while looking at Table 1 and the table from Part 1. If we want to estimate core losses in the inductor, which depends on the ac swing ΔI, this has a maximum at highest input voltage — not at minimum input voltage. Thus, we would need to first set r = 0.3 at the lowest input voltage, then calculate the required inductance, and then finally to use the equations for ΔI, to calculate it at the highest input voltage. Basically, “L” forms the required “bridge” to go from one voltage end to another, because once we fix its value, it remains so. Everything else can change, as this two-part article concludes.
Thanks to my old friend, mentor, and boss Dr. G.T. Murthy (retired) for unforgettable inspiration many years ago, and to my wife Disha and daughter Aartika in making the effort possible today.
For more information on this article, CIRCLE 334 on Reader Service Card