Faced with an ongoing need to handle higher current levels within the same or less board space, makers of low-voltage MOSFETs are vying to prove their package designs can handle the heat. MOSFET manufacturers are developing innovative approaches to surface-mount packaging that retain the popular SO-8 footprint but significantly improve its thermal performance. At the same time, these package redesigns are improving the electrical performance of the MOSFETs by reducing the parasitic resistances associated with package interconnects.
“Intel is increasing the current going into its processors but wants to keep power-conversion circuits the same size, if not make them smaller, so it's necessary to increase the current density of power-conversion circuits,” explains Carl Blake, marketing director for DirectFET MOSFETs at International Rectifier (El Segundo, Calif.).
Power components makers have increased current density by packing more functionality into smaller die. Now, however, “The number one issue for designers of power conversion circuits is the thermal impedance of power conversion IC packages,” Blake says.
IR's DirectFET packages are based on a double-sided cooling design, improving thermal impedance from both the bottom and the top of a device. “Everyone else was focused on just dumping heat to the board,” Blake contends (see the figure). “We used a high-density 1U server as a demo vehicle to look at the benefit of removing heat out of the top of a dc-dc converter,” he explains. “The state-of-the-art was 60 A. We targeted and achieved 100 A within the same board space.”
IR subsequently raised the capability by about 20% and then doubled density again in its most recent design. “We're working now to deliver 150 A, keeping up with the latest Intel processors,” Blake says. He notes that unlike SO-8 packaging, DirectFET requires no wirebonding and no plastic encapsulation. “That means we eliminate the two biggest parts of the assembly process as well as the biggest sources of failure in assembly. We also eliminate the resistance associated with wirebond leads. All of the alternatives we've seen add processing steps.”
Other vendors counter that their packaging alternatives are compatible with the pick-and-place automation equipment used in semiconductor manufacturing facilities. Royal Philips Electronics (Amsterdam, The Netherlands) launched its LFPAK (loss-free package) in 2002, and since then has grown the line to cover different voltage and on-state resistance (RDSON) levels, according to John Miller, marketing strategy and innovation manager for power products. The first devices targeted dc-dc converters, but Philips has expanded to serve mobile, desktop computing and server applications with the package.
“We reviewed a number of available options and talked with customers about what they were looking for,” says Miller. “Smaller board space availability is a consequence of consumers wanting more features, so our customers require higher power densities in limited footprint areas. We could get RDSon lower by working hard on silicon, but we could lose that gain if we didn't do something about packaging.”
Traditional wirebonds have been the main contributor to loss, according to Miller, who claims that Philips, with help from Hitachi, cut losses by about half by using a copper clip in lieu of bond wires on a package with the look and feel — and manufacturability — of a DPAK and an SO-8-compatible footprint. The design dumps heat to the PC board.
“With products gaining more and more features, the potential for heat is something that designers should be aware of, but there are many ways of dealing with it. There's no need to overemphasize thermal management,” Miller cautions, adding that he sees top-down cooling as a niche market. “If a customer needs [top-down cooling], we can help them design-in a heat sink.”
The SO-8's 6-mm × 5-mm outline has been the industry standard for small synchronous rectification devices, but the plastic bottom of an SO-8 limits current handling, according to Steve Abbott, product marketing manager for power conversion devices at STMicroelectronics Inc. (Lexington, Mass.).
ST's 6-mm × 5mm PowerFLAT package uses terminal pads instead of leads and has an exposed metal slug connected directly to the drain. Abbott notes that direct connection of the die to the printed circuit board (PCB) improves heat transfer dramatically, thus boosting the package's current-carrying ability. “The package is capable of supporting a continuous drain current as high as 35 A.”
Abbott concedes that dumping heat to a PCB can pose problems in some environments. “In effect, IR made a reverse Power SO-8 with metal on top so that heat can radiate into the air. We realized the same need for topside versus bottom-side cooling. We now have in R&D a device that will compete with DirectFET.” The package will offer topside cooling, but it will be an epoxy-resin-based package rather than “a die with a cap on it.” The epoxy package should enhance manufacturability, according to Abbott.
“Our focus is on providing better thermals, a smaller footprint and lower package resistance,” says John Bendel, vice president of the low-power product group at Fairchild Semiconductor Inc. (San Jose, Calif.). With an SO-8 footprint, Fairchild's flip-leaded molded package (FLMP), which pulls heat from the bottom of a die, improved thermal performance significantly. The firm also produces single- and dual- N- and P-channel MOSFETs in BGA packages. It recently licensed GEM Services Inc. to produce BGA packages for other semiconductor manufacturers.
Bendel says the BGA packages can double and sometimes quadruple the electrical and thermal performance of power devices in standard leaded packages, offering high current densities; low gate, drain and source inductances and resistances; a low profile (0.9-mm or less); a good footprint figure of merit (FFOM); low thermal resistance; and the potential for heat sinking from both the bottom and the top of the package.
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