Dc-dc converters commonly employ multiple parallel SO8 devices as synchronous rectifiers. Although the SO8 package has the advantage of a small footprint, it's thermally inferior to power packages, such as LFPAK. Typically, the junction-to-solder point thermal resistance of an SO8 device is in the range 20kW to 30kW, depending on chip size. The junction-to-mounting base thermal resistance of an LFPAK device is usually in the range of 2kW to 3kW. The inferior thermal capability of the SO8 package means it's often necessary to parallel multiple devices in order to spread the power dissipation and prevent any one device from running too hot — something seen on many commercially available converters. Unfortunately, connecting several devices in parallel may lead to excessive dissipation in the MOSFET drivers and can subsequently have a negative impact on the converter's overall efficiency.
Gate Driver Losses
Although MOSFETs used as synchronous rectifiers don't suffer from switching losses, the charging and discharging of the MOSFET gates can be a source of significant loss in the gate driver circuitry. A MOSFET gate driver connects its gate to VCC or 0V via an impedance. As current flows through the driver impedance, it dissipates energy in the impedance. The amount of energy dissipated is determined by several factors, including VCC, the QG(tot) figure for the MOSFET, and the nature of any additional impedance between the driver output and the MOSFET gate. Fig. 1 shows how to measure the losses in the MOSFET gate driver by observing IG and either VDH (turn-on) or VDL (turn-off) and applying a scope math function to this data. If the intended frequency of operation of the synchronous rectifier is known, then converting the driver loss figures into actual driver dissipation in watts is a straightforward matter.
A key factor affecting the losses in the gate driver is the peak current flowing through the driver during turn-on or turn-off. The peak current is determined by several factors — in particular, by the type of drive circuitry employed and the nature of the path between the driver and MOSFET gate and source pins through which IG flows. Even with the best possible p.c. board layout, the IG path will have a certain amount of inductance. This inductance, combined with the Ciss of the MOSFET, forms a resonant circuit between the driver and MOSFET, and may result in ringing in the IG waveform and high peak currents, which result in excessive driver dissipation. Peak currents may be limited by “damping” the resonant circuit with a small resistor, perhaps of 5Ω or less. Fig. 2 demonstrates the effect of damping resistances (RG) of 0Ω, 2.2Ω and 4.7Ω on the IG waveform at turn-on. You can see a similar effect at turn-off.
For example, when a MOSFET is used as a primary side switch, it's not usual to include a resistor in the MOSFET gate path because this results in slower switching and increased switching loss within the MOSFET. However, when used as a synchronous rectifier, the MOSFET doesn't suffer from switching loss and, as seen in Fig. 2, even an RG of 4.7Ω doesn't significantly alter the speed with which the MOSFET moves from body diode to on-state conduction. However, the inclusion of RG noticeably reduces the driver loss, as seen in Fig. 3.
As we have now introduced resistor RG into the IG path, RG will dissipate power. You can calculate the dissipation within RG by squaring the IG waveform, then measuring the area of the IG2 waveform. Multiplying this figure by RG gives IG2 × RG × t, which is the energy lost in joules in RG during the switching event.
The RG loss figure should be added to the loss figures of Fig. 3 for the cases where RG = 2.2Ω and 4.7Ω, thus yielding the total loss figure for the driver and RG. Table 1 lists the RG losses.
To convert these figures to dissipations in watts, first multiply the total loss figure by 2 to allow for turn-on and turn-off. Multiply by 2 again to allow two MOSFETs per converter. Assuming an operating frequency of 200 kHz per MOSFET and driver, multiply by 4×105. Applying this procedure to the total loss figures gives dissipations in Table 2, on page 46.
Although adding resistor RG in the gate path decreases the dissipation in the driver, additional dissipation is incurred within RG. This dissipation negates the saving in driver dissipation and results in almost no benefit in terms of reduced power dissipation.
Gate Driver Losses
In this example, we'll consider two devices — an “industry-standard” SO8 device commonly used as a synchronous rectifier, and a new device in an LFPAK package. The LFPAK package retains the same small footprint as an SO8 but has the thermal performance similar to a D-Pak. The devices have the characteristics listed in Table 3.
In another exercise, we measured the driver loss for three parallel SO8 devices, with a combined RDS(on) of 2.3mΩ, and a single LFPAK device with an RDS(on) of 2.4mΩ. In both cases, RG = 0Ω. We assumed there would be two synchronous rectifiers in a complete converter. The loss figures were converted to power dissipations using the procedure described above. Table 4 shows the results. Even for synchronous rectifier solutions of similar RDS(on), the driver losses for the multiple SO8 solution are much higher.
An SO8 package typically uses gold bond wires to make the internal connection from the device source to copper leadframe. Due to limited space in an SO8 package, the wires must be thin and few in number, and will contribute a significant amount of resistance (perhaps as much as 1mΩ to 2mΩ) to the total RDS(on) for the device. Therefore, to achieve a particular RDS(on) for the device as a whole, it's necessary to use a disproportionate amount of silicon. A larger piece of silicon has intrinsically higher capacitance and QG(tot) characteristics, resulting in greater driver loss. However, the LFPAK package uses a different construction method that eliminates thin gold bond wires. Hence, a smaller piece of silicon achieves a particular RDS(on) and provides the benefits of lower QG(tot) and driver loss.
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