The newest silicon technology has made packaging the limiting factor for higher performance MOSFETs. In some of the latest products, as much as 50% of the RDS(on) is from the resistance associated with a package because of lead frame and wire bonds. International Rectifier's DirectFET package, a surface-mount package developed especially for dc-dc power applications, contains no wire bonds and no lead frame. This package enables system designers to take advantage of the newest form factor for desktop computers: the Balanced Technology Extended (BTX) systems form factor developed by Intel to improve thermal system design and other issues.
The silicon die is contained in a copper housing (copper “can”). The bottom of the package consists of a die specifically designed with source and gate contact pads that can be soldered directly to the PCB. The copper can forms the drain connection from the other side of the die to the board (Fig. 1). A proprietary passivation system on the silicon die isolates the gate and the source pads to prevent shorting and acts as a solder mask when the device is mounted on the PCB. The passivation layer also protects the termination and gate structures from moisture and other contamination.
This design eliminates the lead frame and wire bonds, reducing die-free package resistance (DFPR) to a mere 0.1 mΩ in an SO-8 footprint, compared to 1.5 mΩ for the standard SO-8 package or approximately 0.5 mΩ for other SO-8 enhanced type packages.
The DirectFET package transfers heat out through the top of the device and away from the PCB. The thermal resistance from junction to case (metal can) (Rθ(J-A)) is 3°C/W, while the thermal resistance from case to heatsink (Rθ(C-S)) is less than 5°C/W. The thermal resistance from heatsink to ambient (Rθ(S-A)) is less than 4°C/W. This leads to a total topside thermal resistance of less than 12°C/W from junction to ambient (Rθ(J-A)).
With the use of heatsinks and cooling airflow, the DirectFET package can dissipate more heat out of the top of the package, reducing operating temperatures by as much as 50°C compared to more common plastic encapsulated power devices. Effective topside cooling means that heat dissipated can be pulled away from the circuit board, increasing the currents the device can safely carry. High top Rθ(J-C) explains why standard and derivative SO-8 packages are only used with single-side cooling through the PCB.
Meanwhile, on the bottom side of the device, the thermal resistances are from 1°C/W from junction to PC board (Rθ(J-PCB)), and greater than 40°C/W from PC board to ambient (Rθ(PCB-A)). This sums to a thermal resistance of greater than 41°C/W from junction to ambient (Rθ(J-A)) through the bottom of the package.
With current requirements now exceeding 100 A, multiphase buck converters are required to remove more than 30 W of power in the latest desktop computers. The new packaging technology improves efficiency and thermal performance, allowing these high current levels to be achieved by a single control and synchronous FET per phase. This eliminates the need to parallel multiple devices, simplifying board layout. The improved electrical and thermal performance allows smaller solution footprints, higher current density and stable board temperatures.
Embedded Converter Design
To demonstrate the packaging benefits in an embedded voltage regulator down (VRD) design, a high-current 3-phase converter was designed using DirectFET MOSFETs (Fig. 2).
The design uses one of IR's 3-phase controllers operating at 300 kHz to minimize losses. The design is capable of 105 A (>33A/phase) in this small footprint, and it uses a single control and synchronous DirectFET MOSFET per phase. The low profile of the devices allows the DirectFET MOSFETs to be mounted on the board with a heatsink attached on top of the DirectFET devices, as shown in Fig. 2. This maximizes the size of the heatsink while staying within VR outline specifications.
To reduce cost, the heatsink is a simple finned-aluminum extrusion. It was attached on top of the DirectFET MOSFETs using an electrically isolating, heat conducting thermal interface material (TIM). The current density achieved is greater than 5.4 A/cm2 (35A/in2) at 45°C with only 200 LFM airflow required, providing a viable solution for the next-generation desktop processors housed in the BTX form factor.
The specifications of the 20-V DirectFET control and synchronous FET are shown in the table. Note the high current capability (ID) of both the devices.
The MOSFETs have been optimized for the socket requirements, with the low RDS(on) (IRF6620) device used in the synchronous FET socket, which has the maximum duty cycle and highest average current demands. The IRF6623 is used in the control FET socket with a short duty cycle where switching losses dominate. But for higher current per phase, lower RDS is important. The gate charge of these devices is extremely low to limit driver losses.
Similar designs using D-Pak or SO-8 packaged devices use three to five devices per phase, increasing device count. Package losses and gate charge losses also increase, thereby increasing driver losses and compromising efficiency.
The small board size and efficient board layout are achieved through the high thermal and electrical efficiency of the DirectFET package. The device is packaged in the original DirectFET package, which shares the 6.3-mm × 4.9-mm footprint of the standard SO-8. However, the IRF6623 control FET is housed in a 4.9-mm × 3.6-mm version of the DirectFET package, which is half the size of the original.
In order to optimize the Vcore converter design, efficiency measurements were made under various thermal and electrical operating conditions. Fig. 3 shows the efficiency and losses generated by the 12-V input, 1.35-V output VRD operating at 300 kHz under normal operating conditions. As you can see, using the finned heatsink and airflow over the DirectFET devices for effective topside cooling increased the current capability to well over 100 A with only three phases.
Andrew Sawle et al, “DirectFET - A Proprietary New Source Mounted Power Package for Board Mounted Power.” PCIM Europe 2001, presented at Nürnberg, Germany.
International Rectifier Application Note 1035, “DirectFET™ Technology: Board Mounting Guidelines.” www.irf.com/product-info/hexfet/directfet.htm
Intel Technology Forum 2001 Presentations.
Carl Blake, “New Packaging Technology Doubles Current Density Again,” September 2003.
International Rectifier Application Note 1054, “DirectFET Technology: Board Layout Guidelines.”.
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