Power Electronics

Dual Buck Regulator Allows Flexible Load Sharing

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A monolithic, synchronous-buck converter IC with integrated MOSFETs generates two output voltages with up to 6 A of total output current, which may be divided between the two outputs in different combinations. Intersil's ISL65426 achieves this flexibility using a unique power-block architecture that allows the partitioning of six 1-A blocks to support one of four configuration options. Meanwhile, the part enables a compact dual-voltage supply by virtue of its 1-MHz fixed-switching frequency and its modest requirement for external passives.

The ISL65426 contains two master power blocks, one for each regulator output. The chip also includes four floating slave power blocks, which can be assigned to either output via two external logic signals. The allowable combinations for outputs 1 and 2 are: 3 A + 3A; 4 A + 2 A, 5 A + 1 A; or 2 A + 4 A. Each power block has its own power-supply input pin, and the designer must configure the part so common channels join these inputs to one input power supply. In addition, common synchronous power-switch connections for each channel must be joined together and to an external inductor. At startup, the regulator verifies that the external configuration of the power blocks is correct per the programmed settings prior to initiating soft-start (see the figure).

The regulator features independent enable pins for synchronization or sequencing soft-start intervals of the two converter channels. A third enable pin allows sequencing for multi-input bias supplies. In addition, a power-good indicator is provided for each output channel.

Operating from an input voltage of 2.375 V to 5.5 V, the ISL65426 generates two output voltages that are selectable or externally adjustable from 0.6 V to 80% of the input voltage. The regulator exploits current-mode control to minimize external component requirements.

One of Intersil's example application circuits produces dual 3-A outputs at 1.2 V and 2.5 V, and shows two 1.5-µH inductors and two 200-µF capacitors on the outputs. This design also uses two 10-µF input capacitors, an RC filter on the 3.3-V input supply and a resistor divider on the third enable pin. This example employs a single-input supply, but dual-input supplies may also be used. The chip itself is housed in a 5-mm × 10-mm, 50-lead QFN.

Efficiency may be as high as 95% with 5-V input and 3.3-V output with up to 3 A of load current, which requires a connection of three power blocks. Output voltage may be programmed via a 2-bit VID code to 0.6 V, 1.2 V, 1.5 V or 1.8 V. Other values may be programmed using external resistor dividers and output voltage accuracy is ±1% over temperature.

Other features include short-circuit and thermal-overload protection as well as overcurrent and undervoltage protection.

Unit pricing is $4.17 in quantities of 1000. For more information, see www.intersil.com.

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