Power Electronics

# Forward-Converter Design Leverages Clever Magnetics

A synchronous rectified forward converter optimized for performance and cost uses coupled inductors for output filtering and transformer-based gate drive.

In part one of this article (July 2007), design goals for a two-output, 130-W forward converter with synchronous rectification were defined, and procedures were given for designing the input rectifier filter and the transformer. Here, in part two, the steps needed to complete the design are described. These include the design of the coupled-output inductor, selection of synchronous MOSFETs and output capacitors, and requirements for loop compensation. Test data reveals the performance of the final design.

### Coupled Inductor

As mentioned before, in a forward topology, a filter inductor is required for each output winding. However, if each winding contains a separate inductor, the cross-regulation can become quite poor as the loads on the various windings change. This is because there will be no immediate reaction to any load change on an output that is not directly controlled by the feedback loop. For these unregulated outputs, the response to a load change can only occur after the effect of that load change has been detected by the regulated output. The unregulated output voltage can vary considerably until this response occurs.

However, by winding the output inductors on the same core, thereby creating coupled inductors, the dynamic cross regulation can be greatly improved.[1] For coupled inductors, if the noncontrolled output load varies, the controlled output senses it immediately, and the feedback loop responds accordingly. The key point to understand is that the turns ratio of the output inductors must equal the turns ratio of the transformer output windings themselves. Under that condition, the same voltage ratio will be presented to each inductor. If this turns-ratio condition is not met, it will cause a significant ripple current between the outputs that will create a large ripple voltage.

To calculate the controlled output inductance, the expressions in Eqs. 1 and 2 are used:

where DMIN is expanded as follows:

Using the previously established values for this design, the output inductance for the 12-V output is calculated to be 41.6 µH. The air gap will be set to achieve the 41.6 µH. The coupled inductor is designed to operate in the continuous conduction mode (CCM) with the previously stated ripple factor of KRF = 0.15. Since the coupled inductor is operating in CCM, the flux swing is limited by core saturation. Consequently, the area product can be calculated by:

where IPK is the short-circuit current and K is the core utilization factor (0.5 in this case due to two windings).[2] This equation may look similar to the area-product equation for determining the transformer core size (as shown in Eq. 12 in part one of this article); however, it is significantly different because it is used for calculating the area product for an energy-storage inductor rather than a true transformer. In this design, an EER35 core would easily work and would be a conservative choice for the coupled output inductor.

A first-order approximation of the short-circuit current can be made by first knowing the current-limit trip point of the controller, which in the case of the FS7M0880 is nominally 5 A. Using the previously calculated transformer primary-to-secondary turns ratio (32:8) yields a short-circuit current of 20 A.

Eq. 12 is used to calculate the minimum turns count for the 12-V output winding:

If an EER35 core is used with a BMAX value of 0.3 T, the turns count for the 12-V output winding should be 25.9 turns. By pushing the maximum flux density somewhat, the turns count can be lowered to 24, thereby making it easier to preserve the 8:5 turns ratio of the transformer. If the inductor has a 12-V winding turns count of 24, then the 7-V output winding will have 15 turns. Determining wire size for each winding in the coupled inductor is similar to the same process for the transformer. Eq. 5 is used to determine the rms current in each winding:

### Choosing Synchronous FETs

To choose the synchronous FETs, the first thing to calculate is the rms current for each device. The high-side FET rms current can be calculated by using Eq. 5, since it is in series with the winding. A similar approach can be used for the low-side FET; realizing that the duty cycle for this FET is (1-DMAX), otherwise known as the off-state duty cycle.

The drain-source voltage that each FET must block during the time it is off must also be calculated. The reverse voltage that each FET sees is essentially the maximum input voltage multiplied by the turns ratio:

Next, the actual FET selection is made based on these requirements, as well as on acceptable power dissipation and package style.

### Selecting Output Capacitors

A major advantage of the forward topology in an application such as this design is the relatively low ripple current in the output capacitors. The filtering action of the output inductor in Fig. 1 reduces the capacitor ripple current to a triangular waveform. The ripple current in the capacitor is expressed as:

With a low value for the ripple factor (KRF), it can be seen that the ripple current in the capacitor can be quite low. Capacitor manufacturers' datasheets should be consulted to verify that the selected capacitor can carry the calculated ripple current. The ripple voltage will be the capacitor ripple current multiplied by the equivalent series resistance (ESR) of the capacitor. If the specified ripple voltage cannot be attained by a single capacitor, a small secondary low-pass LC filter can be added after the output capacitor.

### Closing the Feedback Loop

Finishing the design requires compensating the feedback loop. To get the signal across the mains boundary, we used Fairchild's FOD2743, a device that combines the 431-type reference and the optocoupler in one package. Since this is a current-mode, multiple-output forward converter, the control-to-output transfer function will consist of a dc-gain term, an output pole and an output zero, all summarized in Table 1.

In Table 1, ILIM represents the current-limit trip point of the control IC. This is a necessary variable when using current-mode control. The V2OUT12 V/PO term represents the effective load resistance of the power supply.[3] Using a standard type-II compensation circuit, illustrated in Fig. 5, places the compensation pole, zero and unity-gain point of the integrator at frequencies determined by the expressions summarized in Table 2.

The factor of 3000 in Table 2 represents the internal resistance of the FPS device. It is important to note that RBIAS and R2 have no effect on the transfer function. Consequently, R2 should be varied when a change in output voltage is necessary. CTR represents the current-transfer ratio of the optocoupler. The CTR and the dynamic resistance of the photodiode will contribute the greatest degree of variability to the closed-loop response. Minimum and maximum values of each should be considered at maximum and minimum load within the specified temperature range to make sure the system is stable under all conditions.

A representative bode plot of this design is shown in Fig. 2. It was taken at 120 Vac and maximum load. Notice that the system has adequate phase margin and gain margin.

### Enhancing Performance Using Magnetics

The complete design for the forward converter with self-driven synchronous rectification and a coupled inductor is shown in Fig. 3. The primary-side FET drain-source voltage and drain-current waveforms are shown in Fig. 4. The converter circuit can demonstrate the improvement in efficiency brought about by synchronous rectification. Data was taken on a working implementation of this circuit using both synchronous rectification and Schottky diodes. As shown in Fig. 5, efficiency is improved by the use of synchronous rectification. The magnitude of this increase should be even greater for lower output voltages, where the diode losses become a greater percentage of the total losses.

Another improvement realized by this design is the cross-regulation of the unregulated (7-V) output. This is accomplished through the use of the coupled inductor shared by the regulated and unregulated outputs. As shown in Fig. 6, the voltage regulation of the 7-V output is well maintained across the range of load current combinations for both outputs. This enhanced regulation complements the high efficiency and reduced cost for the converter.

### References

1. Dixon, Lloyd, “Coupled Filter Inductors in Multi-Output Buck Regulators,” Unitrode Power Supply Seminar SEM500, 1986.

2. Dixon, Lloyd, “Coupled Inductor Design,” Unitrode Power Supply Seminar SEM900, 1993.

3. Choi, Hang-Seok, Fairchild Semiconductor, Application Note AN4134, p. 7, March 24, 2004.

4. Choi, Hang-Seok, Fairchild Semiconductor, Application Note AN4134, p. 6, March 24, 2004.