Power Electronics

Digitally Controlled AC-DC Supply

A kit employing a dual-thread processor is intended as a production-ready test system tailored to meet the needs of an ac-dc power-supply. This digitally-controlled test supply combines hardware, development software, and example application firmware.

Green Plug Digital controller technology will feature in a family of mixed-signal SoCs to support the design of digitally controlled AC-DC power supplies. These SoCs also have optional on-chip communication capability, which gives the designer control over the complete power system.

Digital control techniques provide power conversion advantages, including:

  • The in-system development board makes all control parameters available to the designer, so subsequent designs are more easily modified. This makes tailored power supplies more economical to produce and provides faster time-to-market.
  • The designer is not constrained to a fixed control loop algorithm. Differing load and regulation conditions are met with differing algorithms so the designer can modify system operation under predetermined conditions.

This kit’s inherent flexibility is used to improve all aspects of power converter operation, including efficiency, regulation overload variation, and maximum-rating behavior, as well as adapting the supply to the load. Integration of major control-loop elements in the processor SoC, such as the ADC, DAC, comparators, and PWM controller, minimize external components.

Dual-Core Processor

The Green Plug Power Processor (GPP) is a programmable mixed-signal, integrated power controller intended for switch-mode, power supply applications (Fig. 1). Previous digital-power controllers usually separated the loop regulation and system-management functions into different processing units, such as DSP and RISC processors, where the loop-regulation unit is not fully programmable. Other single-processor, single-thread controllers typically rely on interrupt service routines for loop regulation at the cost of system overhead.

The GPP dual-hardware thread processor allows design of the regulation loop in one dedicated thread and housekeeping tasks on the other thread. The dedicated loop regulation thread processes feedback with no overhead. Extended DSP instructions are available on both threads, so the roles of the two threads are interchangeable.

Depending on the load-side implementation, several unique benefits are possible:

  • Toggling the power supply fully off to fully on, based on load requirements.
  • Changing the power-supply output voltage to suit differing load operating conditions.
  • Optimizing battery-charging conditions, based on feedback from the load device, such as, battery conditioning, or high-speed charging.
  • Load device identification and security.

Customer Development Kit

The designer can build and test production-ready firmware tailored to the needs of the target power-supply application using a Customer Development Kit (CDK) that is a combination of hardware, development software, and example application firmware. For illustrative and example purposes, a 90W Quasi-Resonant Converter (QRC) with single-phase power factor correction (PFC) variable-voltage power supply is available as the target power supply.

The CDK provides all the resources necessary to integrate the GPP into a target system. However, exact requirements vary based on power-supply topology and control scheme. The CDK has three major components:

  • GPP Development Module (GDM)
  • GPP Development Environment (GDE)
  • Power Supply Application Example Code, included in the GDE.

By combining these three components, the power-systems engineer can:

  • Build the application specific GPP code.
  • Test the code in the target power-supply system.
  • Output the code base to Green Plug for inclusion in the ready-for-production, GPP masked ROM.

GPP Development Module (GDM)

The GDM consists of a mixed-signal integrated controller, serial-Flash memory chip and other support components mounted on a p.c. board (Fig. 2). Four multi-pin connectors provide all electrical connections and a robust mounting system for the GDM on the target power supply. All possible pin-out combinations for the production GPP are supported through the four header connectors that are mounted on the boardís bottom-side. The JTAG connector and DIP-switch block located on the boardís topside enable the GDE to connect directly to the GDM.

Designers have two options for integrating the GDM with their own power supply design.

One is in the 90W QRC board where the GDM is mounted directly onto the PCB (Fig. 2), via the quad connector assembly. Although this board configuration is convenient and structurally sound, it is not intended as a final power-supply board design.

The final production unit will occupy considerably less space than the quad connector arrangement used on the example power-supply board. Both the final production versions of GPP and the GDM have a single 3.3-V supply. However, the GDM includes a 20-MHz crystal that needs to be replicated on the production power-supply board.

The GPP Development Environment (GDE) comprises a C complier and debug environment, based on the CodeScape IDE from Imagination Technologies, Ltd., to support the dual-thread, embedded processor core in GPP.

Communication with the GPP occurs through the JTAG header located on the GDM that is connected to the JTAG debugger via the supplied ribbon cable (Fig. 3). Typically, the JTAG debugger is connected via a USB cable to a single host computer, or an Ethernet debugger can be supplied to support multiple/remote code development.

90-W Evaluation Board

The 90 W Evaluation Power Supply Board (Fig. 4) provides and evaluation example of GPP capabilities. While good engineering practices have been employed during the development of the board and due diligence is given to safety requirements typical for this type of power converter, no characterization or environmental testing has been completed.

The evaluation board consists of a single stage PFC Front-End, operating as a boost converter. It is controlled by the GPP to maintain the DC-bus voltage above the actual AC peak-input voltage. To improve efficiency, Boundary Mode Control (BMC) and Quasi-Resonant, falling-edge switching are employed to ensure that the energy in the PFC inductor is fully discharged before the next switching cycle and that the boost diode losses are minimized.

Synchronous rectification techniques are used to minimize conduction losses in the Secondary Rectifier (SR) with a stand-alone device controlling the low conduction path switch.

GPP is deployed on the primary side of the Quasi-Resonant Converter (QRC) topology controlling the power train to provide output voltage regulation. BMC is also used on the down converter switch to improve efficiency. GPP also modulates the switching frequency to optimize efficiency across the power supply’s complete output power range.

Secondary-side voltage and current information is transferred to GPP on the primary side in the analog domain, by sending proportional pulses through two small pulse transformers, where they are sampled by the GPP’s analog-to-digital controller (ADC).


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