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Among powerconverter topologies, the singletransistor forward converter is one of the most common for power levels below 100 W. This article, however, focuses on the improvements to the circuit known as the singletransistor, resonantreset forward converter, which eliminates the reset winding and a diode (DTR) while offering several other advantages.
Its duty cycle can exceed 50%, making it suitable for lowcost dcdc converters that operate from a wide range of input voltages and deliver widely varying outputs. The absence of a reset winding reduces costs by simplifying the transformer, especially for the planar transformers widely used in highdensity dcdc converter modules. Finally, the resonantreset circuit's sinusoidal reset voltage reduces EMI.
To properly appreciate the resonantreset topology, we must first understand the conventional singleswitch forward converter (Fig. 1). When switch Q1 turns on, the transformer current rises from zero and the diode DTR is reverse biased. Transformer magnetizing current builds up to a value I_{M}=V_{IN}×T_{ON}/L_{M}, where T_{ON} is the on time per switching cycle and L_{M} is the magnetizing inductance.
During the switch's on period, the load current I_{O} is reflected in the primary as I_{P}=I_{O}×N_{S}/N_{P}, where N_{S} is the number of secondary turns and N_{P} is the number of primary turns. Output voltage is V_{O}=V_{IN}×D×N_{S}/N_{P}, where D=T_{ON}/T_{S} and 1/T_{S} is the switching frequency. Magnetizing current in the transformer primary just before turnoff is V_{IN}×T_{ON}/L_{M}. When Q1 turns off, the transformer voltage tends to reverse. Voltage on the DTR cathode keeps decreasing until DTR turns on.
For typical applications, the N_{P}/N_{R} turns ratio is 1, where N_{R} is the number of turns in the primary reset winding. The transformer magnetizing current now decreases from I_{M} to zero. When it reaches zero, the transformer is fully reset and voltage across the transformer remains at zero until the start of the next switching cycle. The maximum duty cycle (D_{MAX}) in these applications is limited to 50%. On the other hand, singleswitch, resonantreset forward converters (Fig. 1) are characterized by the absence of a reset winding. During the off time, the transformer resets (without loss) through a resonant circuit consisting of the magnetizing inductance and the combined capacitance of the switch (C_{S}), primary winding (C_{P}) and all reflected secondary capacitances (C_{RS}), including the rectifyingdiode capacitance.
Description of Operation
Assumptions are made in the following circuit analysis:

The circuit has reached steadystate operation.

L_{O} and C_{O} (fairly large) can be considered infinite.

Leakage inductance is neglected.

Drops due to the diode and switch onresistance are neglected.
Steadystate operation for the circuit comprises three intervals in each switching cycle:
Interval 1. Initially, t=0 and Q1 is on (Fig. 2a). The transformer is magnetized with a ramp current during this interval, defined as T_{ON}. Secondary current flows through the secondary diode DR, and the voltage across capacitance C_{D} is approximately zero. C_{D} includes the internal diode capacitance and the external capacitance added across diode DR. The primary magnetizing current has a value of I_{1} at the start of this interval and I_{2} at the end of the interval:
The primary current I_{P} is the sum of the reflected current I_{R} (equal to I_{O}×N_{S}/N_{P}) and the primary magnetizing current I_{MAG}.
Interval 2. When the switch is turned off, the switch Q1 draintosource voltage begins to rise (Fig. 2b). When that voltage exceeds V_{IN}, the polarity across the secondary winding is reversed. Then the secondary diode DR turns off and the freewheeling diode DF turns on. A sinusoidal demagnetization current starts to flow through the resonant circuit formed by the parallel combination of transformer magnetizing inductance L_{M} and the capacitance C_{R} reflected across the transformer primary. The capacitance C_{R} is the sum of all capacitances across the primary including the reflected capacitance C_{D}, the internal plus external capacitance across diode DR (internal diode capacitance of DR<<C_{D}):
where C_{S} is the primary switch capacitance and C_{T} is the transformer primary capacitance. Interval 2 equals T_{ON} + T_{R}, where T_{R} is onehalf of a resonant interval:
The external capacitance C_{R} charges from zero to a peak value of:
during this interval, and then discharges back to zero. The magnetizing current I_{1} at the end of the interval should therefore equal I_{2}. The draintosource voltage (V_{DS}) on the primary switch Q1 at the end of this interval is V_{IN}, but reaches a peak of:
halfway through Interval 2.
Interval 3. During this interval, diodes DR and DF are both on, and the primary switch is off (Fig. 2c). Voltage across the transformer primary is held to zero by the reflected virtual short across diode DF, and the magnetizing current is held to I_{2} for the entire interval. The end of Interval 3 defines the end of a switching cycle, and because the circuit is at steady state, the current I_{1} equals I_{2}. Substituting for I_{1} in Eq. 1, we see that the primary magnetizing current at the start of each switching cycle is:
During the entirety of Interval 3, the voltage across the transformer primary is held at 0 V, so the primary switch voltage V_{DS} remains at V_{IN}. Note that at the end of T_{S}, I_{2}≠I_{1} is possible if π√L_{M} × C_{R} > T_{R}. In that case, a full halfcycle of resonance has not been completed before the next switching cycle begins, and therefore the voltage across the primary switch exceeds V_{IN} at the start of each switching cycle. That condition increases the switching loss.
Transient Operation
Transient stresses on the primary switch and secondary output diodes can vary greatly depending on the type of controller used in the application. If the design is not optimal, transients can cause failure in the primary switches or the secondary diodes.
Consider operation with a currentmode PWM controller. Initially, the power supply operates at noload and highline voltage. A load transient is applied (minimum load to full load), which causes an immediate dutycycle step to maximum duty cycle. In turn, that event causes a large increase in the transformer's magnetizing current and may saturate the transformer unless its design accounted for such transients. The resonantreset voltage is much higher than that during steadystate operation and may cause failure in the forward diode or the primary switch.
To combat this problem, we introduce a voltµsec clamp. Consider the controller above with a maximum dutycycle clamp that is inversely proportional to the input voltage. That arrangement limits the maximum flux excursion along the BH loop of the transformer during a transient, which allows the use of a smaller transformer. Transientvoltage stress on the forward diode and the primary switch is significantly less, but is still higher than during steadystate operation.
Now consider the operation of this converter type with a very light load using diodes for rectification. Magnetizing current is very close to zero during this mode of operation, and the duty cycle is low. If we now apply a load transient (from no load to full load), the duty cycle immediately increases to the maximum value allowed by the adaptive dutycycle clamp. Before application of the transient, the magnetizing current is zero. The transient peak duty cycle at highline voltage is:
where V_{INmin} is the lowline input voltage, D_{MAXtr} is the maximum duty cycle at lowline voltage set by the adaptive dutycycle clamp, and V_{INmax} is the input voltage at highline voltage. When a transient occurs, the magnetizing current increases from zero to:
in the first switchon cycle after the transient, where L_{M} is the primary magnetizing inductance and f_{S} is the switching frequency. After the switch turns off, the magnetizing current reverses in a sinusoidal fashion set by the magnetizing inductance L_{M} and capacitance C_{R}. Peak voltage on the switch is:
For steadystate operation at fullload and highline voltage, the peak steadystate voltage on the switch is:
where D_{MAXs} is the steadystate duty cycle at full load and low line. In practical applications, we try to set D_{MAXtr} slightly higher than D_{MAXs}. We also see that the peak transient reverse voltage on the diode DF is more than twice as high as the peak steadystate reverse voltage with this type of pulsewidth modulated (PWM) controller. For PWM controllers without the voltµsec clamp, the transient voltage can be even higher.
If the circuit includes synchronous rectifiers, the inductor current does not become discontinuous, and the magnetizing currents at light load and at full load are almost the same. For PWM currentmode controllers with voltµsec clamps, the transientvoltage stress on the primary switch and the secondary diode DF is closer to the peak steadystate voltage stress.
The behavior of voltagemode controllers is similar to that of currentmode PWM controllers. Again, the use of an adaptive voltµsec clamp can reduce stress. These converter types often include a dutycycle softstart that ramps up the duty cycle, controlling any buildup of magnetizing energy while alleviating voltage stress.
Design Example
The working power supply of Fig. 3 accepts dc input voltages in the range 36 V to 56 V, and produces an isolated variable output voltage in the range of 4 V to 18 V, controlled by an adjustable external reference. The maximum output current is 0.4 A and the switching frequency is 500 kHz.
The resonantreset forward converter is most suitable for this design because it lets us maximize the duty cycle. That capability is necessary if the output voltage is to be properly controlled from high levels all the way down to 4 V. Otherwise, the PWM controller's minimum on time is a limitation that could introduce problems. Synchronous rectifiers should be included to maximize efficiency and enable the PWM controller to control the output voltage down to 4 V at light loads. The currentmode PWM controller shown also includes an adaptive voltµsec clamp.
Because the power supply must turn on at 36 V and provide full power at 36 V, we set its turnon point at 34.2 V. That value of turnon voltage includes a 5% margin to compensate for component tolerances. We then set the maximum duty cycle corresponding to the turnon point (set by the adaptive duty cycle) at 75%. That leaves 25% of the switching time available for resetting the transformer at the converter's lowest operating voltage.
At the lowest operating voltage, the maximumavailable reset time for the transformer is:
where D_{MAX}=0.75 and f_{S}=5×10^{5}. These values yield a reset time of 0.5 µs. To minimize switching loss, the magnetizing current should complete one halfcycle of sinusoidal “resonant ringing” as given by Eq. 4. Therefore, and the peak steadystate voltage stress on the primary switch (obtained by substituting values in Eq. 7) is 217.2 V. Thus, for this design we choose a switch rated at 250 V.
Primarytosecondary turns ratio for the transformer is:
We choose a transformer with an EFD15 core of 3F3 material, and obtain n ≤ 1.35 by substituting values in Eq. 9. The actual primary turns (30) and secondary turns (24) yield a turns ratio of 1.25. The magnetizing inductance for this transformer, wound using ungapped cores, is 702 µH ± 25%. Tolerance in the magnetizing inductance could produce a tolerance of (+11%)/(13.4%) in the transformer's selfresonant frequency, not accounting for tolerance in the total capacitance appearing across the primary in the actual circuit. The measured selfresonant frequency of a sample transformer was lower than 1 MHz.
We must guarantee that the actual circuit's demagnetizing selfresonant frequency is higher than f_{S}/(1D_{MAX}). We therefore gap the core, both to reduce the transformer's measured selfresonant frequency and to reduce the variation in magnetizing inductance. Using a gapped core with A_{l} tolerance of 10% yields a magnetizing inductance of 144 µH.
The selfresonant frequency measured for the new transformer sample is 4 MHz, and the transformer capacitance calculated from the expression for selfresonant frequency is 11 pF. Based on the available reset time, the maximum allowable primary capacitance is 176 pF. That value allows a maximum of 165 pF for the sum of switch capacitance and reflected diode capacitance (C_{R}). Because MOSFET capacitance is not easily determined, we must build the circuit and adjust the value of added capacitance across the synchronous MOSFET (QR) to get the appropriate reset time. In the actual power supply, the added capacitance across MOSFET QR is 100 pF.
The output inductor and capacitor are chosen to optimize efficiency and ensure compliance with the outputripple specification. Thus, the inductor value is 47 µH, and CO is formed by connecting three ceramic capacitors in parallel, each rated 4.7 µF and 25 V.
For the primary MOSFET Q1 (voltage rating of 250 V), we choose an FQD4N25 from Fairchild Semiconductor (South Portland, Maine) for its low inherent capacitance and low onresistance. This MOSFET also minimizes the gatedrive loss, conduction loss and switching loss.
Peak stress on the synchronous rectifier QR is:
where n_{A} is the power transformer's actual primarytosecondary turns ratio. In this case, n_{A} is 1.25 and the calculated value of V_{QR} is 122 V. Therefore, we choose a 150V MOSFET for QR. The peak voltage stress on the freewheeling MOSFET QF is:
where n_{A} is 1.25 and V_{INmax} is 56 V. The calculated value is 44.8 V, so for QF we choose a MOSFET rated at 60 V. (The control circuit and synchronous MOSFET drives are shown in Fig. 3 but not discussed further.)
Experimental Results
Figs. 4 and 5 show voltage waveforms on the primary MOSFET of Fig. 3 at different input voltages and various output voltages, with an output load of 400 mA. The drainvoltage waveforms clearly show that the resonantreset voltage does not vary with line voltage, but is proportional to the output voltage. Peak voltage on the primary MOSFET is equal to the input voltage plus the resonantreset voltage.
We conclude that resonantreset forward converters are quite suitable for power supplies operating from widerange dcvoltage inputs. They also are suitable for applications requiring a wide range of adjustable output voltage. In designing resonantreset forward converters, you should take care to minimize the stress of transient voltages on the devices (the use of synchronous rectification reduces transientvoltage stress on the power semiconductors). For optimum performance, you also should choose an appropriate controller.